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ARM Cortex-R4 - Page 434

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Revisions
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. E-2
ID073015 Non-Confidential
Updated reset value information for:
Cache Type Register
MPU Type Register
Instruction Set Attributes Register 1
Instruction Set Attributes Register 4
Current Cache Size Identification Register
Current Cache Level ID Register
MPU Region Base Address Registers
MPU Region Size and Enable Register
MPU Region Access Control Register
MPU Memory Region Number
ATCM Region Register
BTCM Region Register
TCM selection Register
Performance Monitor Control Register
Software Increment Register
User read/write Thread and Process ID Register
User read-only Thread and Process ID Register
Privileged-only Thread and Process ID Register
Secondary Auxiliary Control Register
Build Options 1 Register
Build Options 2 Register
Correctable Fault Location Register
Table 4-2 on page 4-9
Updated Type information for the CPACR Table 4-2 on page 4-9
Clarified the description of the Instruction Set Attributes Register 3 Figure 4-21 on page 4-31
Table 4-17 on page 4-32
Clarified functions for bits [31], [30], [29], and 28] Table 4-24 on page 4-41
Clarified functions for bits [20], [19], [18], [17], [16], [3], and [2] Table 4-25 on page 4-44
Clarified instructions that the PFU recognizes as procedure calls and
procedure returns
Return stack on page 5-5
Added reference to Application Note 204 Memory types on page 7-7
Added section Using memory types on page 7-7
Clarified the description of region attributes Region attributes on page 7-8
Clarified the description of store buffer draining Store buffer draining on page 8-19
Clarified the encodings for some signals AXI master interface on page 9-3
Clarified the number of Identifiers used for AXI bus accesses Identifiers for AXI bus accesses on page 9-4
Clarified the description of the handling of TCM external faults External TCM errors on page 9-21
Added section Dormant mode on page 10-3
Updated the permitted instruction combinations Table C-28 on page C-35
Updated the descriptions for COMMRX and COMMTX signals Table A-13 on page A-17
Table E-1 Differences between issue B and issue C (continued)
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