Mnemonic Operands Description Op Flags
#Clocks
AVR
#Clocks
AVRxm
#Clocks
AVRxt
#Clocks
AVRrc
LD Rd, Y+ Load Indirect
and Post-
Increment
Rd
Y
←
←
(Y)
Y + 1
None 2
(1)
1
(1)
2
(1)
2 / 3
LD Rd, -Y Load Indirect
and Pre-
Decrement
Y
Rd
←
←
Y - 1
(Y)
None 2
(1)
2
(1)
2
(1)
2 / 3
LDD Rd, Y+q Load Indirect
with
Displacement
Rd ← (Y + q) None 2
(1)
2
(1)
2
(1)
N/A
LD Rd, Z Load Indirect Rd ← (Z) None 2
(1)
1
(1)
2
(1)
1 / 2
LD Rd, Z+ Load Indirect
and Post-
Increment
Rd
Z
←
←
(Z)
Z+1
None 2
(1)
1
(1)
2
(1)
2 / 3
LD Rd, -Z Load Indirect
and Pre-
Decrement
Z
Rd
←
←
Z - 1
(Z)
None 2
(1)
2
(1)
2
(1)
2 / 3
LDD Rd, Z+q Load Indirect
with
Displacement
Rd ← (Z + q) None 2
(1)
2
(1)
2
(1)
N/A
STS k, Rr Store Direct to
Data Space
(k) ← Rd None 2
(1)(2)
2
(1)(2)
2
(1)(2)
1
ST X, Rr Store Indirect (X) ← Rr None 1
(1)(2)
1
(1)(2)
1
(1)(2)
1
ST X+, Rr Store Indirect
and Post-
Increment
(X)
X
←
←
Rr
X + 1
None 1
(1)(2)
1
(1)(2)
1
(1)(2)
1
ST -X, Rr Store Indirect
and Pre-
Decrement
X
(X)
←
←
X - 1
Rr
None 2
(1)(2)
2
(1)(2)
1
(1)(2)
2
ST Y, Rr Store Indirect (Y) ← Rr None 2
(1)(2)
1
(1)(2)
1
(1)(2)
1
ST Y+, Rr Store Indirect
and Post-
Increment
(Y)
Y
←
←
Rr
Y + 1
None 2
(1)(2)
1
(1)(2)
1
(1)(2)
1
ST -Y, Rr Store Indirect
and Pre-
Decrement
Y
(Y)
←
←
Y - 1
Rr
None 2
(1)(2)
2
(1)(2)
1
(1)(2)
2
STD Y+q, Rr Store Indirect
with
Displacement
(Y + q) ← Rr None 2
(1)(2)
2
(1)(2)
1
(1)(2)
N/A
ST Z, Rr Store Indirect (Z) ← Rr None 2
(1)(2)
1
(1)(2)
1
(1)(2)
1
ST Z+, Rr Store Indirect
and Post-
Increment
(Z)
Z
←
←
Rr
Z + 1
None 2
(1)(2)
1
(1)(2)
1
(1)(2)
1
ST -Z, Rr Store Indirect
and Pre-
Decrement
Z ← Z - 1 None 2
(1)(2)
2
(1)(2)
1
(1)(2)
2
STD Z+q,Rr Store Indirect
with
Displacement
(Z + q) ← Rr None 2
(1)(2)
2
(1)(2)
1
(1)(2)
N/A
LPM Load Program
Memory
R0 ← (Z) None 3 3 3 N/A
LPM Rd, Z Load Program
Memory
Rd ← (Z) None 3 3 3 N/A
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
26
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