Mnemonic Operands Description Op Flags
#Clocks
AVR
#Clocks
AVRxm
#Clocks
AVRxt
#Clocks
AVRrc
LPM Rd, Z+ Load Program
Memory and
Post-
Increment
Rd
Z
←
←
(Z)
Z + 1
None 3 3 3 N/A
ELPM Extended
Load Program
Memory
R0 ← (RAMPZ:Z) None 3 3 3 N/A
ELPM Rd, Z Extended
Load Program
Memory
Rd ← (RAMPZ:Z) None 3 3 3 N/A
ELPM Rd, Z+ Extended
Load Program
Memory and
Post-
Increment
Rd
(RAMPZ:Z)
←
←
(RAMPZ:Z)
(RAMPZ:Z) +
1
None 3 3 3 N/A
SPM Store
Program
Memory
(RAMPZ:Z) ← R1:R0 None
(4) (4)
4
(3)
N/A
SPM Z+ Store
Program
Memory and
Post-
Increment by
2
(RAMPZ:Z)
Z
←
←
R1:R0
Z + 2
None
(4) (4)
4
(3)
N/A
IN Rd, A In From I/O
Location
Rd ← I/O(A) None 1 1 1 1
OUT A, Rr Out To I/O
Location
I/O(A) ← Rr None 1 1 1 1
PUSH Rr Push Register
on Stack
STACK ← Rr None 2 1
(1)
1 1
(1)
POP Rd Pop Register
from Stack
Rd ← STACK None 2 2
(1)
2 3
(1)
XCH Z, Rd Exchange (Z)
Rd
←
←
Rd
(Z)
None N/A 1 N/A N/A
LAS Z, Rd Load and Set (Z)
Rd
←
←
Rd v (Z)
(Z)
None N/A 1 N/A N/A
LAC Z, Rd Load and
Clear
(Z)
Rd
←
←
($FF – Rd) •
(Z)
(Z)
None N/A 1 N/A N/A
LAT Z, Rd Load and
Toggle
(Z)
Rd
←
←
Rd ⊕ (Z)
(Z)
None N/A 1 N/A N/A
Table 4-5. Bit and Bit-test Instructions
Mnemonic
Operands Description Op Flags
#Clocks
AVR
#Clocks
AVRxm
#Clocks
AVRxt
#Clocks
AVRrc
LSL Rd Logical Shift
Left
Rd(n+1)
Rd(0)
C
←
←
←
Rd(n)
0
Rd(7)
Z,C,N,V,H 1 1 1 1
LSR Rd Logical Shift
Right
Rd(n)
Rd(7)
C
←
←
←
Rd(n+1)
0
Rd(0)
Z,C,N,V 1 1 1 1
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
27
To Next Page
Loading...
Need help?
General
