Basler A504k - Page 29

Camera Interface
Basler A500k Series 2-15
PRELIMINARY
*
Note that the bit assignment of the A504k/kc does NOT follow the current Camera
Link standard in every respect:
• Channel Link No. Y and No. Z do not contain an FVAL signal.
• The data lines are assigned to different input pins.
• The data lines are also assigned to the spare pins and the pins for FVAL and
DVAL.
Note that framegrabbers are available for the Basler-specific bit assignment.
Port Camera
Frame
Grabber
Signal
Port A0 TxIN0 RxOUT0 D0 Bit 0
Port A1 TxIN1
RxOUT1 D0 Bit 1
Port A2 TxIN2
RxOUT2 D0 Bit 2
Port A3 TxIN3
RxOUT3 D0 Bit 3
Port A4 TxIN4
RxOUT4 D0 Bit 4
Port A5 TxIN6
RxOUT6 D0 Bit 5
Port A6 TxIN27
RxOUT27 D0 Bit 6
Port A7 TxIN5
RxOUT5 D0 Bit 7 (MSB)
Port B0 TxIN7
RxOUT7 D1 Bit 0
Port B1 TxIN8
RxOUT8 D1 Bit 1
Port B2 TxIN9
RxOUT9 D1 Bit 2
Port B3 TxIN12
RxOUT12 D1 Bit 3
Port B4 TxIN13
RxOUT13 D1 Bit 4
Port B5 TxIN14
RxOUT14 D1 Bit 5
Port B6 TxIN10
RxOUT10 D1 Bit 6
Port B7 TxIN11
RxOUT11 D1 Bit 7 (MSB)
Port C0 TxIN15
RxOUT15 Not Used
Port C1 TxIN18
RxOUT18 Not Used
Port C2 TxIN19
RxOUT19 Not Used
Port C3 TxIN20
RxOUT20 Not Used
Port C4 TxIN21
RxOUT21 Not Used
Port C5 TxIN22
RxOUT22 Not Used
Port C6 TxIN16
RxOUT16 Not Used
Port C7 TxIN17
RxOUT17 Not Used
LVAL TxIN 24
RxOUT24 Line Valid
FVAL TxIN25
RxOUT25 Frame Valid
Not Used TxIN26
RxOUT26 Not Used
Not Used TxIN23
RxOUT23 Not Used
PClk TxCLKIn
RxCLKOut Pixel Clock
Table 2-7: Bit Assignments of the Channel Link Transmitter for the A501k/kc