Basler A504k - Video Data Output for the A501 K;Kc

Camera Interface
Basler A500k Series 2-19
PRELIMINARY
Figure 2-8: 8 Bit output Mode with Programmable Exposure for the A504k/kc
2.5.6 Video Data Output for the A501k/kc
A501k/kc cameras output the video data in a 2 * 8 Bit data stream.
The pixel clock is used to time data sampling and transmission. As shown in Figures 2-9 and 2-
10, the camera samples and transmits data on each rising edge of the pixel clock.
The image has a maximum size of 1280*1024 pixels that are transmitted with a Pixel Clock
frequency of 50MHz over the Channel Link transmitter/receiver pair X. With each clock cycle two
pixels at a depth of 8 Bits are transmitted in parallel. Therefore one line takes a maximum of 640
clock cycles to become transmitted. For more details about sensor timing, please refer to the
Micron MV13 data sheet (www.micron.com).
Due to the internal sensor design, the Area of Interest feature is restricted in horizontal directions
to values that are multiples of ten. For details please read the register description of the AOI
Starting Column and the AOI Width register. Image is transmitted line by line from top left to bottom
right. Frame Valid (FVAL) and Line Valid (LVAL) mark the beginning and duration of frame and line.
The line valid bit indicates that a valid line is being transmitted. Pixel data is valid when the line
valid bit is high.
Frame
Valid
Line
Valid
Line 1 Line 2 Line 1024
Pixel
Clock
(66 MHz)
min. 3 µs
0.015 µs
0.06 µs 1.89 µs
1.95 µs
0 µs
2000 µs
D_0
Pixel Data
(8 bits)
1261 1271111
1271
1
1261 12711
D_10
Pixel Data
(8 bits)
1270 128010 20
128010
1270 128010 20
D_2
Pixel Data
(8 bits)
1263 1273313
12733
1263 1273313
D_1
Pixel Data
(8 bits)
1262 1272212
1272
2
1262 12722
11
12
end of
programmed
time
This diagram assumes that the area of interest feature is not being used. With the area of interest feature enabled,
the number of pixels transferred could be smaller.