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Basler A504k - Page 32

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Camera Interface
2-18 Basler A500k Series
PRELIMINARY
Figure 2-7: 8 Bit Output Mode with Edge or Level-controlled Exposure for the A504k/kc
ExSync
Signal
Frame
Valid
Line
Valid
Line 1 Line 2 Line 1024
Pixel
Clock
(66 MHz)
min. 3 µs
0.015 µs
0.06 µs 1.89 µs
1.95 µs
0 µs
2000 µs
D_0
Pixel Data
(8 bits)
1261 1271111
1271
1
1261 12711
D_10
Pixel Data
(8 bits)
1270 128010 20
128010
1270 128010 20
D_2
Pixel Data
(8 bits)
1263 1273313
12733
1263 1273313
D_1
Pixel Data
(8 bits)
1262 1272212
1272
2
1262 12722
11
12
This diagram assumes that the area of interest feature is not being used. With the area of interest feature enabled,
the number of pixels transferred could be smaller.

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