Beck IPC SC123 User Manual

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 5
List of Figures
Figure 3-1: Block Diagram ............................................................................................................................................... 9
Figure 4-1: Ball Grid Array Looking through Top of Package ........................................................................................ 10
Figure 5-1: power on flowchart with power fail interrupt enabled ................................................................................... 23
Figure 6-1: 24-Bit Address Generation .......................................................................................................................... 25
Figure 6-2: Contiguously segments in memory ............................................................................................................. 25
Figure 6-3: 8 Bit read access from C00
h
, CSBE = 0, Read = 0x55 ............................................................................... 26
Figure 6-4: 16 Bit read access from C00
h
, CSBE = 0, Read = 0x1234 .......................................................................... 26
Figure 6-5: 16 Bit read access from C01
h
, CSBE = 0, Read = 0x5678 .......................................................................... 27
Figure 6-6: 8 Bit read access from C01
h
, CSBE = 0, Read = 0x55 ............................................................................... 27
Figure 6-7: 8 Bit write access to C00
h
, CSBE = 0, Write = 0x23.................................................................................... 28
Figure 6-8: 16 Bit write access to C00
h
, CSBE = 0, Write = 0x1234.............................................................................. 28
Figure 6-9: 16 Bit write access to C01
h
, CSBE = 0, Write = 0x5678.............................................................................. 29
Figure 6-10: 8 Bit write access to C01
h
, CSBE = 0, Write = 0x23 ................................................................................. 29
Figure 6-11: 8 Bit write access to C00
h
, CSBE = 1, Write = 0x23 ................................................................................. 30
Figure 6-12: 8 Bit write access to C01
h
, CSBE = 1, Write = 0x23 ................................................................................. 30
Figure 6-13: 16 Bit write access to C00
h
, CSBE = 1, Write = 0x1234 ............................................................................ 31
Figure 6-14: 16 Bit write access to C01
h
, CSBE = 1, Write = 0x5678 ............................................................................ 31
Figure 6-15: TX Message Routing ................................................................................................................................. 37
Figure 6-16: Pullup-/down Resistors for USB full-speed device .................................................................................... 38
Figure 6-17: Sketch of the logic to decode the chip select for an external memory ....................................................... 40
Figure 6-18: Internal reset processing ........................................................................................................................... 41
Figure 7-1: Memory Map ............................................................................................................................................... 42
Figure 8-1: System bus timing ....................................................................................................................................... 48
Figure 8-2: Reset Timing ............................................................................................................................................... 49
Figure 9-1: PCB Board Design suggestion .................................................................................................................... 50
Figure 9-2: PCB Board Design suggestion .................................................................................................................... 50
Figure 10-1: Package Dimensions ................................................................................................................................ 52
Figure 10-2: Cover......................................................................................................................................................... 53
Figure 11-1: Minimum Circuit Requirements for SC1x3 ................................................................................................ 54
Figure 11-2: Ethernet Example Circuit ........................................................................................................................... 55
Figure 11-3: Example circuit for connecting an external memory .................................................................................. 56
Figure 11-4: Circuit Example for two bi-coloured LEDs ................................................................................................. 57
Figure 11-5: Circuit Example for four mono-coloured LEDs .......................................................................................... 57
Figure 11-6: SC1x3-Socket ........................................................................................................................................... 58
Figure 13-1: Reflow Profile ............................................................................................................................................ 60

Beck IPC SC123 Specifications

General

Brand	Beck
Model	IPC SC123
Category	Controller
Language	English