EasyManua.ls Logo

decaWave DW1000 - Page 164

decaWave DW1000
242 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
DW1000 User Manual
© Decawave Ltd 2017
Version 2.12
Page 164 of 242
Table 44: Sub-Register 0x2B:0B – FS_PLLTUNE values
Operating Channel
8-bit value to program to
Sub-Register 0x2B:0B –
FS_PLLTUNE
1
0x1E
2,4
0x26
3
0x56
5,7
0xBE
7.2.44.4 Sub-Register 0x2B:0C – FS_RES2
ID
Length
(octets)
Type
Mnemonic
Description
2B:0C
2
RW
FS_RES2
Frequency synthesiser – Reserved area 2
Register file: 0x2B – Frequency synthesiser control block, sub-register 0x0C is a reserved area. Please take
care not to write to this area as doing so may cause the DW1000 to malfunction.
7.2.44.5 Sub-Register 0x2B:0E – FS_XTALT
ID
Length
(octets)
Type
Mnemonic
Description
2B:0E
1
RW
FS_XTALT
Frequency synthesiser – Crystal trim
Register file: 0x2B – Frequency synthesiser control block, sub-register 0x0E is the crystal trim register. This
allows a fine control over the crystal oscillator to tune the DW1000 operating frequencies quite precisely.
For details of the use of this register please refer to section 8.1 – IC Calibration – Crystal Oscillator Trim.
N.B.: Bits 7:5 must always be set to binary “011”. Failure to maintain this value will result in DW1000
malfunction.
REG:2B:0E – FS_XTALT – Crystal Trim Setting
7
6
5
4
3
2
1
0
R
R
R
XTALT
0
1
1
0
0
0
0
0
The bits of the FS_XTALT register identified above are individually described below:

Table of Contents