EasyManua.ls Logo

decaWave DW1000 - Page 183

decaWave DW1000
242 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
DW1000 User Manual
© Decawave Ltd 2017
Version 2.12
Page 183 of 242
Table 50: Sub-Register 0x2E:1806 LDE_CFG2 values
RXPRF configuration
Value to program to
Sub-Register 0x2E:1806 LDE_CFG2
(1) = 16 MHz PRF
0x1607
(2) = 64 MHz PRF
0x0607
7.2.47.7 Sub-Register 0x2E:2804 LDE_REPC
ID
Length
(octets)
Type
Mnemonic
Description
2E:2804
2
RW
LDE_REPC
LDE Replica Coefficient configuration
Register file: 0x2E Leading Edge Detection Interface, sub-register 0x2804 is a 16-bit configuration register
for setting the replica avoidance coefficient. The accumulator operates on the preamble sequence to give
the channel impulse response. This works because of the perfect periodic auto-correlation property of the
IEEE 802.15.4 UWB preamble sequences. The auto-correlation is not perfect where there is a significant
clock offset between the remote transmitter and the local receiver. In these circumstances small amplitude
replicas of the channel impulse response appear repeatedly throughout the accumulator span. The
magnitude of this effect is dependent on the clock offset and on the preamble code being employed. To
avoid the LDE erroneously seeing one of these replica signals as the leading edge the threshold used for
detecting the first path is artificially raised by a factor depending on the measured clock offset. For optimum
performance this factor also needs to be dependent on the preamble code selected in the receiver. To
achieve this, the LDE_REPC configuration needs to be set depending on the receiver preamble code
configuration. The values required are given in Table 51. These values apply to 850 kbps and 6.8 Mbps data
rates only.
Table 51: Sub-Register 0x2E:2804 LDE_REPC configurations for (850 kbps & 6.8 Mbps)
RX_PCODE
9
configuration
LDE_REPC
value to set
RX_PCODE
configuration
LDE_REPC
value to set
1
0x5998
13
0x3AE0
2
0x5998
14
0x35C2
3
0x51EA
15
0x2B84
4
0x428E
16
0x35C2
5
0x451E
17
0x3332
6
0x2E14
18
0x35C2
7
0x8000
19
0x35C2
8
0x51EA
20
0x47AE
9
RX_PCODE configuration is set Register file: 0x1F Channel Control

Table of Contents