decaWave DW1000 - Page 199

DW1000 User Manual
© Decawave Ltd 2017
Version 2.12
Page 199 of 242
7.2.50.6 Sub-Register 0x36:26 – PMSC_TXFSEQ
ID
Length
(octets)
Type
Mnemonic
Description
36:26
2
RW
PMSC_TXFSEQ
PMSC fine grain TX sequencing control
Register file: 0x36 – Power Management and System Control, sub-register 0x26 is used to control TX fine
grain power sequencing function. The PMSC_TXFSEQ register contains the following sub-fields:
REG:36:26 – PMSC_TXFSEQ – PMSC fine grain TX sequencing Control Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TXFINESEQ
0
0
0
0
1
0
1
1
0
0
1
1
1
1
0
0
The fields of the PMSC_TXFSEQ register identified above are described below:
Field
Description of fields within Sub-Register 0x36:26 – PMSC_TXFSEQ
TXFINESEQ
reg:36:26
bits:15–0
Writing 0 to this field will disable TX fine grain power sequencing, this is required for certain
test and calibration modes (Continuous Wave transmission). To enable fine grain power
sequencing the default value of 0x0B74 should be written back to this register.
Note that TX fine grain power sequencing must be disabled if an external power amplifier is
being used with the DW1000.
7.2.50.7 Sub-Register 0x36:28 – PMSC_LEDC
ID
Length
(octets)
Type
Mnemonic
Description
36:28
4
RW
PMSC_LEDC
PMSC LED Control Register
Register file: 0x36 – Power Management and System Control, sub-register 0x28 is a 32-bit LED control
register. The PMSC_LEDC register contains the following sub-fields:
REG:36:28 – PMSC_LEDC – PMSC LED Control Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
BLNKNOW
-
-
-
-
-
-
-
BLNKEN
BLINK_TIM
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
The fields of the PMSC_LEDC register identified above are individually described below:
Field
Description of fields within Sub-Register 0x36:28 – PMSC_LEDC
-
Bits marked ‘-’ are reserved and should be preserved at their reset value.