GE MiCOM P40

4.1.1 CB TRIP CONVERSION LOGIC DIAGRAM
V03387
Trip Inputs A
1
R
Q
S
CB1 Trip OutputA
Trip Inputs B
1
R
Q
S
CB1 Trip OutputB
Trip Inputs C
1
R
Q
S
CB1 Trip OutputC
CB1Tripping Mode
3 Pole
1
1
AR Force CB1 3P
Force 3PTrip CB1
CB1 Trip I/P 3Ph
&
1
R
Q
S
CB1 Trip 3ph
Trip Inputs A
1
R
Q
S
CB2 Trip OutputA
Trip Inputs B
1
R
Q
S
CB2 Trip OutputB
Trip Inputs C
1
R
Q
S
CB2 Trip OutputC
CB2Tripping Mode
3 Pole
1
1AR Force CB2 3P
Force 3PTrip CB2
CB2 Trip I/P 3Ph
&
1
R
Q
S
CB2 Trip 3ph
1
Any Trip
Dwell
100 ms
1
1
1
Pole Dead A
Pole Dead B
Pole Dead C
Trip Inputs A
Trip Inputs B
Trip Inputs C
&
&
&
1
&
R
Q
S
R
Q
S
2/3 Ph Fault
3 Ph Fault
≥
2
530
531
532
530
531
532
858
533
529
1485
1604
1608
530
531
532
892
893
894
523
524
525
526
1601
1602
1603
1600
522
527
528
Figure 30: Circuit Breaker Trip Conversion Logic Diagram (Module 63)
4.2
RESIDUAL COMPENSATION
To improve accuracy of impedance measuring elements such as those used in distance protection and fault
locators, the total loop impedance calculation Z
LP
/I
A
can be calibrated by the positive sequence impedance
between the relaying point and the fault (Z
F1
) using the following equation:
Z
V
I k I
F
A
A ZN N
1
=
+ ⋅
where:
● V
A
is the phase A voltage
● I
A
is the phase A current
● I
N
is the residual current, derived from the phase currents by the equation:
P446SV Chapter 5 - Configuration
P446SV-TM-EN-1 85