Intel® Quiet System Technology (Intel® QST)
Thermal and Mechanical Design Guidelines 57
6 Intel
®
Quiet System
Technology (Intel
®
QST)
In the Intel
®
965 Express Chipset Family a new control algorithm for fan speed control
is being introduced. It is composed of a Manageability Engine (ME) in the Graphics
Memory Controller Hub (GMCH) which executes the Intel
®
Quiet System Technology
(Intel
®
QST) algorithm and the ICH8 containing the sensor bus and fan control
circuits.
The ME provides integrated fan speed control in lieu of the mechanisms available in a
SIO or a stand-alone ASIC. The Intel QST is time based as compared to the linear or
state control used by the current generation of FSC devices.
A short discussion of Intel QST will follow along with thermal solution design
recommendations. For a complete discussion of programming the Intel QST in the ME
please consult the Intel
®
Quiet System Technology (Intel
®
QST) Configuration and
Tuning Manual.
6.1 Intel
®
Quiet System Technology Algorithm
The objective of Intel QST is to minimize the system acoustics by more closely
controlling the thermal sensors to the corresponding processor or chipset device
T
CONTROL
value. This is achieved by the use of a Proportional-Integral-Derivative (PID)
control algorithm and a Fan Output Weighting Matrix. The PID algorithm takes into
account the difference between the current temperature and the target (T
CONTROL
), the
rate of change and direction of change to minimize the required fan speed change.
The Fan Output Weighting Matrix utilizes the effects of each fan on a thermal sensor
to minimize the required fan speed changes
Figure 21 shows in a very simple manner how Intel QST works. See the Intel
®
Quiet
System Technology (Intel
®
QST) Configuration and Tuning Manual for a detail
discussion of the inputs and response.
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