Intel S1200V3RP - Page 120

BIOS Setup Interface Intel® Server Board S1200V3RP TPS
Revision 1.2
106
Help Text: <None>
Comments: Information only. Displays size in MB of the processor L3 Cache.
Since L3 cache is shared between all cores in a processor package, this is shown as the
total amount of L3 cache per processor package.
Back to [Advanced Screen] — [Screen Map]
7. Processor Version
Option Values: <ID string from processor>
Help Text: <None>
Comments: Information only. Displays Brand ID string read from processor
with CPUID instruction.
Back to [Advanced Screen] — [Screen Map]
8. CPU Core Ratio
Option Values: [0 – 63]
Help Text:
Enter Core Ratio Multiplier. 0 - 63.
Comments: In order for this option to be available, Show CPU Core Ratio must
be Enabled.
Back to [Advanced Screen] — [Screen Map]
9. Show CPU Core Ratio
Option Values: Enabled
Disabled
Help Text:
Allow Edits to Core Ratio Multiplier.
Comments:
Back to [Advanced Screen] — [Screen Map]
10. Intel(R) Turbo Boost Technology
Option Values: Enabled
Disabled