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Intel S1200V3RP Technical Product Specification
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Appendix
B: Inte
grated BMC Senso
r Tables
Intel®
Server Board S
1200V3RP T
PS
Revision 1.2
222
Full Sensor
Name
(Sensor name
in SDR)
Se
ns
or
#
Platform
Applicabilit
y
Sensor
Type
Event/R
eading
Type
Event Offset Triggers
Contrib.
To
System
Status
Assert
/De-
assert
Reada
ble
Value/
Offset
s
Event
Data
Rearm
St
an
db
y
(IPMI
W
atch
dog)
23h
c
6Fh
01
- Hard reset
02
- Power down
03
- Power cycle
08
- Timer interrupt
Physical
Security
(Physical
Scrty)
04
h
Chassis
Intrusion
is
chassis-
specific
Physica
l
Securit
y
05h
Sensor
Specifi
c
6Fh
00
- Chassis intrusion
Degrad
ed
OK
As
and
De
–
Trig
Offset
A
X
04
- LAN leash lost
FP Interrupt
(FP NMI
Diag Int)
05
h
Chassis -
specific
Critical
Interrup
t
13h
Sensor
Specifi
c
6Fh
00
- Front panel
NMI/diagnostic
interrupt
OK
As
–
Trig
Offset
A
–
SMI Timeout
(SMI
Timeout)
06
h
All
SMI
Timeou
t
F3h
Digital
Discret
e
03h
01
–
State asserted
Fatal
As
and
De
–
Trig
Offset
A
–
System
Event Log
(System
Event Log)
07
h
All
Event
Loggin
g
Disable
d
10h
Sensor
Specifi
c
6Fh
02
- Log area
reset/cleared
OK
As
–
Trig
Offset
A
X
System
Event
(System
Event)
08
h
All
System
Event
12h
Sensor
Specifi
c
6Fh
02
- Undetermined
system H/W failure
Fatal
As
and
De
As
-
Trig
Offset
A
X
04
–
PEF action
OK
Button
Sensor
(Button)
09
h
All
Button/
Switch
14h
Sensor
Specifi
c
6Fh
00
–
Power Button
OK
AS
_
Trig
Offset
A
X
02
–
Reset Button
BMC
W
atch
dog
0
A
h
All
Mgmt
System
Health
28h
Digital
Discret
e
03h
01
–
State Asserted
Degrad
ed
As
–
Trig
Offset
A
-
Voltage
Regulator
W
atch
dog
(VR
W
atch
dog)
0
B
h
All
Voltage
02h
Digital
Discret
e
03h
01
–
State Asserted
Fatal
As
and
De
–
Trig
Offset
M
X
Fan
Redundancy
1
(Fan
Redundancy
)
0
C
h
Chassis-
specific
Fan
04h
Generi
c
0Bh
00
- Fully redundant
OK
As
and
De
–
Trig
Offset
A
–
01
- Redundancy lost
Degrad
ed
02
- Redundancy
degraded
Degrad
ed
03
- Non-redundant:
Degrad
235
237
Table of Contents
Default Chapter
4
Table of Contents
4
1 Introduction
15
Chapter Outline
15
Server Board Use Disclaimer
16
2 Overview
17
Intel ® Server Boards S1200V3RP Product Family Feature Set
17
Table 1. Intel Server Board S1200V3RP Feature Set
17
Server Board Layout
19
Server Board Connector and Component Layout
19
Figure 1. Intel Server Board S1200V3RP Layout
19
Figure 2. Intel Server Board S1200V3RPL and S1200V3RPS Layout
20
Figure 3. Intel Server Board S1200V3RPO and S1200V3RPM Layout
21
Server Board Mechanical Drawings
22
Figure 4. Intel Server Board S1200V3RP - Mounting Hole Locations
22
Figure 5. Intel Server Board S1200V3RP - Major Connector Pin-1 Locations
23
Figure 6. Intel Server Board S1200V3RP - Primary Side Keepout Zone
24
Server Board Rear I/O Layout
25
Figure 7. Intel Server Board S1200V3RP - Second Side Keepout Zone
25
Figure 8. Intel Server Board S1200V3RP Rear I/O Layout
25
3 Functional Architecture
26
Processor Subsystem
26
Intel ® Xeon ® Processor E3-1200 V3 Product Family
27
Th Generation Intel Core I3 Processors
27
Processor Function Overview
27
Integrated Memory Controller (IMC) and Memory Subsystem
28
Supported Memory
29
Table 2. UDIMM Support Guidelines
29
Figure 10. Intel ® Server Board S1200V3RP DIMM Slot Layout
30
Table 4. Intel Server Board S1200V3RP DIMM Maximum Configuration
30
Memory RAS Features
31
Post Error Codes
32
Processor Integrated I/O Module (IIO)
32
Table 3. Intel
33
Table 5. PCI Express* Speed Matrix for each Configuration
33
Intel ® Integrated RAID Option
34
Optional I/O Module Support
34
Table 6. Supported Intel
34
I/O At2)
35
Intel ® C220 Series Chipset PCH Functional Overview
35
Figure 10. Intel
35
Figure 11. Functional Block Diagram - Chipset Supported Features and Functions
35
Figure 17. Intel
35
Figure 9. Intel
35
Table 13. Intel
35
Table 14. Intel
35
Table 29. Intel
35
Table 7. Intel
35
Digital Media Interface (DMI)
36
PCI Express* Interface
36
Serial ATA (SATA) Controller
36
Low Pin Count (LPC) Interface
37
Serial Peripheral Interface (SPI)
38
Table 8. Intel
38
Universal Serial Bus (USB) Controller
38
Gigabit Ethernet Controller
39
Table 9. External RJ45 NIC Port LED Definition
39
Enhanced Power Management
40
Kvm/Serial over LAN (SOL) Function
40
Serial Ports
40
Intel Virtualization Technology for Direct I/O (Intel VT-D)
41
Intel ® Virtualization Technology for Direct I/O
41
System Management Bus (Smbus* 2.0)
41
Integrated Baseboard Management Controller (BMC) Overview
41
Figure 12. Integrated Baseboard Management Controller (BMC) Overview
42
Figure 13. Integrated BMC Functional Block Diagram
42
Graphics Controller and Video Support
43
Super I/O Controller
43
Table 10. Video Modes
43
Table 11. Video Mode
44
Baseboard Management Controller
45
4 System Security
47
BIOS Password Protection
47
Trusted Platform Module (TPM) Support
48
TPM Security BIOS
48
Physical Presence
49
TPM Security Setup Options
49
Figure 14. Setup Utility - TPM Configuration Screen
50
Table 12. TPM Setup Utility - Security Configuration Screen Fields
50
Intel ® Trusted Execution Technology
51
5 Intel Technology Support
52
Intel ® Trusted Execution Technology
52
Intel Virtualization Technology - Intel VT-X/Vt-D/Vt-C
52
Intel ® Intelligent Power Node Manager
53
Hardware Requirements
55
6 Platform Management Functional Overview
56
Baseboard Management Controller (BMC) Firmware Feature Support
56
IPMI 2.0 Features
56
Non-IPMI Features
57
Basic and Advanced Features
58
Table 15. Basic and Advanced Features
58
Advanced Configuration and Power Interface (ACPI)
59
Table 16. ACPI Power States
59
Power Control Sources
60
BMC Watchdog
60
Table 17. Power Control Initiators
60
Fault Resilient Booting (FRB)
61
Sensor Monitoring
61
Field Replaceable Unit (FRU) Inventory Device
62
System Event Log (SEL)
62
6.10 System Fan Management
62
Thermal and Acoustic Management
62
Thermal Sensor Input to Fan Speed Control
63
Fan Profiles
64
Figure 15. Fan Speed Control Process
64
Table 18. Fan Profiles
64
Memory Thermal Throttling
65
6.11 Messaging Interfaces
66
User Model
66
Table 19. Messaging Interfaces
66
IPMB Communication Interface
67
LAN Interface
67
Address Resolution Protocol (ARP)
73
Internet Control Message Protocol (ICMP)
73
Virtual Local Area Network (VLAN)
73
Secure Shell (SSH)
74
Serial-Over-LAN (SOL 2.0)
74
Platform Event Filter (PEF)
74
LAN Alerting
75
Table 20. Factory Configured PEF Table Entries
75
Alert Policy Table
76
SM-CLP (SM-CLP Lite)
76
Embedded Web Server
77
Virtual Front Panel
78
Embedded Platform Debug
79
Data Center Management Interface (DCMI)
81
Table 21. Diagnostic Data
81
Table 22. Additional Diagnostics on Error
81
Lightweight Directory Authentication Protocol (LDAP)
82
7 Advanced Management Feature Support (RMM4)
83
Figure 16. Intel RMM4 Lite Activation Key Installation
83
Table 23. RMM4 Option Kits
83
Figure 17. Intel ® RMM4 Dedicated Management NIC Installation
84
Table 24. Enabling Advanced Management Features
84
Remote Console
85
Availability
86
Force-Enter BIOS Setup
86
Performance
86
Security
86
Usage
86
Keyboard, Video, and Mouse (KVM) Redirection
84
Media Redirection
86
Availability
87
Network Port Usage
87
8 On-Board Connector/Header Overview
89
Board Connector Information
89
Table 25. Board Connector Matrix
89
Power Connectors
90
Table 26. Main Power Connector Pin-Out (J9H1)
90
System Management Headers
91
Intel ® Remote Management Module 4 Dedicated NIC Connector
91
Table 27. CPU Power Connector Pin-Out (J9B1)
91
Table 28. Power Supply Auxiliary Signal Connector Pin-Out (J9C3)
91
TPM Connector
92
Intel ® ESRT2 RAID Upgrade Key Connector
92
Local Control Panel Header
92
Table 30. Intel RMM4 - Lite Connector Pin-Out (J4B1)
92
Table 31. TPM Connector Pin-Out (J8J1)
92
Table 32. Intel
92
Table 33. LCP Header Pin-Out (J1G1)
92
HSBP_ I 2 C Header
93
HDD LED Header
93
Chassis Intrusion Header
93
SATA SGPIO Header
93
Table 35. HDD LED Header Pin-Out (J1G2)
93
Table 36. Chassis Intrusion Header Pin-Out (J1F1)
93
Table 37. SATA SGPIO Header Pin-Out (J2K2)
93
IPMB Connector
94
Front Panel Connector
94
Power/Sleep Button and LED Support
94
Table 38. IPMB Connector Pin-Out (J2K1)
94
Table 39. Front Panel 24-Pin Connector Pin-Out (J1E1)
94
System ID Button and LED Support
95
System Reset Button Support
95
NMI Button Support
95
Table 40. Power/Sleep LED Functional States
95
Table 41. NMI Signal Generation and Event Logging
95
NIC Activity LED Support
96
Hard Drive Activity LED Support
96
System Status LED Support
96
I/O Connectors
96
VGA Connector
96
Table 42. VGA Connector Pin-Out (J7A1)
96
Display Port Connector
97
SATA Connectors
97
Serial Port Connectors
97
Table 43. Display Port Connector Pin-Out (J8A1)
97
Table 44. SATA Connector Pin-Out (J1K4, J1K1, J1K5, J1K2, J2K5, J2K3)
97
USB Connector
98
Table 45. External DB9 Serial a Port Pin-Out (J9A1)
98
Table 46. Internal 9-Pin Serial B Header Pin-Out (J9A2)
98
Table 47. Internal USB2.0 Connector Pin-Out (J1K3)
98
Table 48. Internal USB3.0 Connector Pin-Out (J1J1)
99
Table 49. Pin-Out of Internal Low-Profile USB Connector (Eusb) for Solid State Drive (J5K1)
99
Table 50. Internal Type a USB Port Pin-Out (J1J4)
99
I/O Module Connector
100
Table 51. I/O Module Connector Pin-Out (J1C1)
100
SAS Module Connector
101
Table 52. I/O Module Connector Pin-Out (J4J1)
101
NIC1 with USB2.0 Connector
102
NIC2 with USB3.0 Connector
102
Figure 18. NIC1 with USB2.0 Connector
102
Figure 19. NIC2 with USB3.0 Connector
102
Fan Headers
103
Table 53. SSI 4-Pin Fan Header Pin-Out (J7K1, J3K4, J8K1, J8K2, J8B1)
103
9 BIOS Setup Interface
104
Hotkeys Supported During POST
104
POST Logo/Diagnostic Screen
104
Table 54. POST Hotkeys Recognized
104
BIOS Boot Pop-Up Menu
105
BIOS Setup Utility
105
BIOS Setup Operation
105
Table 55. BIOS Setup Page Layout
106
Table 56. BIOS Setup: Keyboard Command Bar
107
BIOS Setup Utility Screens
108
Table 57. Screen Map
109
Figure 20. Main Screen
110
Figure 21. Advanced Screen
115
Figure 22. Processor Configuration Screen
118
Figure 23. Memory Configuration Screen
128
Figure 24. Mass Storage Controller Configuration Screen
132
Figure 25. PCI Configuration Screen
135
Figure 26. NIC Configuration Screen
140
Figure 27. Serial Port Configuration Screen
147
Figure 28. USB Configuration Screen
150
Figure 29. System Acoustic and Performance Configuration Screen
154
Figure 30. Network Stack Screen
157
Figure 31. Security Screen
159
Figure 32. Server Management Screen
164
Figure 33. Console Redirection Screen
171
Figure 34. System Information Screen
175
Figure 35. BMC LAN Configuration Screen
179
Figure 36. Boot Option Screen
191
Figure 37. CDROM Order Screen
197
Figure 38. Hard Disk Order Screen
198
Figure 39. Floppy Order Screen
199
Figure 40. Network Device Order Screen
199
Figure 41. BEV Device Order Screen
200
Figure 42. Add EFI Boot Option Screen
201
Figure 43. Delete EFI Boot Option Screen
202
Figure 44. Boot Manager Screen
203
Figure 45. Error Manager Screen
204
Figure 46. Save & Exit Screen
206
BIOS Update Capability
209
Standalone BIOS Flash Update
210
OS-Running BIOS Flash Update
211
BIOS Backup Flash Update
212
BIOS Recovery
212
10 Jumper Blocks
215
Figure 47. Jumper Blocks (J2K6, J2K8, J2K9, J3K2, J3K6)
215
BIOS Default Jumper Block
216
BIOS Recovery Jumper
216
Table 58. Server Board Jumpers (J2K6, J2K8, J2K9, J3K2, J3K6)
216
Password Clear Jumper Block
217
Management Engine (ME) Firmware Force Update Jumper Block
218
BMC Force Update Jumper Block
219
11 Intel Light Guided Diagnostics
220
Figure 48. On-Board LED Placement
220
System ID LED
221
System Status LED
221
Table 59. System Status LED State Definitions
221
BMC Boot/Reset Status LED Indicators
223
Post Code Diagnostic Leds
223
Table 60. BMC Boot/Reset Status LED Indicators
223
Volt Stand-By Present LED
224
12 Environmental Limits Specification
225
Processor Thermal Design Power (TDP) Support
225
Table 61. Server Board Design Specifications
225
Mtbf
226
Table 62. MTBF Estimate
226
13 Server Board Power Distribution
227
DC Output Specification
227
Output Power/Currents
227
Figure 49. Power Distribution Block Diagram
227
Table 63. over Voltage Protection Limits
227
Cross Loading
228
Standby Output
228
Voltage Regulation
228
Table 64. Loading Conditions
228
Table 65. Voltage Regulation Limits
228
Dynamic Loading
229
Capacitive Loading
229
Grounding
229
Residual Voltage Immunity in Standy Mode
229
Table 66. Transient Load Requirements
229
Table 67. Capacitive Loading Conditions
229
Common Mode Noise
230
Ripple/Noise
230
Timing Requirements
230
Figure 50. Differential Noise Test Setup
230
Table 68. Ripples and Noise
230
Figure 51. Output Voltage Timing
231
Table 69. Output Voltage Timing
231
Table 70. Turn On/Off Timing
231
Figure 52. Turn On/Off Timing (Power Supply Signals)
232
Appendix A: Integration and Usage Tips
233
Appendix B: Integrated BMC Sensor Tables
234
Table 71. Integrated BMC Core Sensors
235
Appendix C: POST Code Diagnostic LED Decoder
253
Figure 53. POST Code Diagnostic Leds
253
Table 72. POST Progress Code LED Example
253
Table 73. POST Progress Codes
254
Table 74. MRC Progress Codes
256
Table 75. POST Progress LED Codes
257
Appendix D: POST Code Errors
259
Table 76. POST Error Codes and Messages
259
Table 77. POST Error Beep Codes
264
Table 78. Integrated BMC Beep Codes
265
Server Chassis
266
Figure 54. Processor Heatsink Installation
266
Table 79. Compatible Intel
266
Appendix E: Supported Intel Server Chassis
270
Reference Documents
270
Other manuals for Intel S1200V3RP
Quick Start User Guide
2 pages
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Intel S1200V3RP Specifications
General
Brand
Intel
Model
S1200V3RP
Category
Server Board
Language
English
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