Intel S1200V3RP - Page 249

Intel® Server Board S1200V3RP TPS Appendix B: Integrated BMC Sensor Tables
Revision 1.2
235
Full Sensor
Name
(Sensor name
in SDR)
Se
ns
or
#
Platform
Applicabilit
y
Sensor
Type
Event/R
eading
Type
Event Offset Triggers
Contrib.
To
System
Status
Assert
/De-
assert
Reada
ble
Value/
Offset
s
Event
Data
Rearm
St
an
db
y
Margin 6
(Agg Therm
Mrgn 6)
01h
01h
Global
Aggregate
Temperature
Margin 7
(Agg Therm
Mrgn 7)
C
E
h
Platform
Specific
Temper
ature
01h
Thresh
old
01h
-
-
-
Analo
g
R, T
A
–
Global
Aggregate
Temperature
Margin 8
(Agg Therm
Mrgn 8)
C
F
h
Platform
Specific
Temper
ature
01h
Thresh
old
01h
-
-
-
Analo
g
R, T
A
–
Baseboard
+12V
(BB +12.0V)
D
0h
All
Voltage
02h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
–
Baseboard
+5V
(BB +5.0V)
D
1h
All
Voltage
02h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
–
Baseboard
+3.3V
(BB +3.3V)
D
2h
All
Voltage
02h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
–
Baseboard
+5V Stand-
by
(BB +5.0V
STBY)
D
3h
All
Voltage
02h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
X
Baseboard
+3.3V
Auxiliary
(BB +3.3V
AUX)
D
4h
All
Voltage
02h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
fatal
As
and
De
Analo
g
R, T
A
X
Baseboard
+1.05V
Processor1
Vccp
(BB
D
6h
All
Voltage
02h
Thresh
old
01h
[u,l] [c,nc]
nc =
Degrad
ed
c =
Non-
As
and
De
Analo
g
R, T
A
–