Intel SE7501HG2 - Processor

Description
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Super I/O
The National Semiconductor
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PC87417 Super I/O Plug-and-Play Compatible with ACPI-Compliant
Controller/Extender is used on the SE7501HG2 server board. This device provides the system with:
• Two serial ports
• One parallel port
• Floppy disk controller (FDC)
• PS/2-compatible keyboard and mouse controller
• Wake event control
Serial Ports
One DB9 connector is provided on the back panel for the Serial A port. The Serial A port is
compatible with 16550A and 16450 modes. This port can be set to one of four different
COM ports, each of which can be enabled separately. When enabled, each port can be programmed
to generate edge- or level-sensitive interrupts. When disabled, the serial port interrupts are
available for add-in cards.
A DH10 10-pin serial header is available on the baseboard for an optional Serial B port. Serial
port B port can be used as an Emergency Management Port.
Parallel Port
The SE7501HG2 baseboard provides a 25-pin parallel port back panel connector. The Super I/O
provides an IEEE 1284-compliant 25-pin bi-directional parallel port. BIOS programming of the
Super I/O registers enables the parallel port and determines the port address and interrupt. When
disabled, the interrupt is available to add-in cards.
Floppy Disk Connector
The floppy disk connector on the server board provides the interface to the floppy disk drive from
the floppy disk controller. BIOS Setup provides options to select the type of floppy disk drive
installed, or to disable the floppy disk controller.
Keyboard and Mouse Connectors
The separate keyboard and mouse connectors, found on the back panel of the server board, are PS/2
compatible and are interchangeable. Setup does not include an option to disable the keyboard or
mouse. Instead, they are automatically detected and tested at system startup. The system can be
booted with either or both disconnected.
Processor
The Intel® Server Board SE7501HG2 accommodates one or two 400 MHz FSB or 533 MHz FSB
Intel Xeon processors with 512KB L2 Cache via two SKT604 604-pin zero-insertion force (ZIF)
sockets. The processors interface with the system bus at 400 MHz or at 533 MHz. When only one
processor is installed, it should be in the socket labeled CPU1 and the other socket must be empty.
For a complete list of supported processors, see:
http://support.intel.com/support/motherboards/server/SE7501HG2