4.7.2 Input / Principle details
Measuring method
The analog and digital input signal is evaluated with a programmable comparator threshold (switching
threshold, hysteresis) and the following 48 bit counter. The FPGA and the digital signal processor (DSP)
convert the respective counter values online into a frequency output (and duty cycle or time period).
The input signal is compared with the defined switching thresholds by using a comparator (see image). The
result is a square wave voltage similar to the frequency at the comparator output. The pulse and the interval
duration of this square wave voltage is detected with the internal 100 MHz counter.
If the timeout expires without any detection of an ON threshold, the zero indication will output the user
defined minimal value. The setting of the timeout is recommended in order to avoid time delays in signal
evaluation. A correct signal evaluation is supported only with sequent detections of ON and OFF thresholds.
Frequency
The frequency is acquired with the interval duration acquisition described above. The reciprocal value of the
counter result of the interval duration measurement is scaled and sent correspondingly to the measuring
range setting.
Duty cycle
The counter value of the pulse duration is divided by the counter value of the interval duration and
correspondingly scaled and sent to the measuring range setting.
If the frequency is too low (or 0 Hz), 0 % (low level) or 100 % (high level) is sent depending on the signal
level.
The thresholds on and off do usually differ and cause different results of the pulse duration and the duty
cycle if the signal edges are low, depending on the defined thresholds.
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