Hardware
1.4 CPU and Peripheral Devices
Figure 1-4 CPU and peripheral devices
1.4.1 CPU
The CPU is MOTOROLA MCF5307 (external frequency 45MHz; operation
frequency 90MHz; processing speed as high as 75MIPS).
The MCF5307 features a 32-bit data bus and a 32-bit address bus. The board
uses a 24-bit addressing mode, reserving the most-significant 8 bits as the
general purpose I/Os for the FPGA.
The MCF5307 can be tuned through the BDM port (J18 of the CPU board).
The CPU board utilizes the built-in I
2
C and UART controllers of the MCF5307 to
use the EEPROM and RTC as expanded serials ports.
The CPU boards utilizes the built-in DRMA controller of the MCF5307 to use the
2×8M SDRAM as the expanded memory.
1.4.2 WDT
The Watch-Dog-Timer (WDT) is TI TPS3828. It monitors the running of the
software. The CPU must send a feedback to the WDT every 1.6s, otherwise the
WDT will force the CPU to restart.
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