NXP Semiconductors MPC5777M - Page 116

MPC5777M Microcontroller Data Sheet, Rev. 6
Electrical characteristics
NXP Semiconductors116
Figure 49. TxD Signal propagation delays
Table 65. TxD output characteristics
1,2
1
TxD pin load maximum 25 pF
2
Specifications valid according to FlexRay EPL 3.0.1 standard with 20%–80% levels and a 10pF load at the end of a
50 Ohm, 1 ns stripline. Please refer to the Very Strong I/O pad specifications.
Symbol Characteristic
Value
Unit
Min Max
dCCTxAsym CC Asymmetry of sending CC at 25 pF load
(= dCCTxD
50%
 100 ns)
–2.45 2.45 ns
dCCTxD
RISE25
+dCCTxD
FALL25
CC Sum of Rise and Fall time of TxD signal at the output
pin
3,4
3
Pad configured as VERY STRONG
4
Sum of transition time simulation is performed according to Electrical Physical Layer Specification 3.0.1 and the entire
temperature range of the device has been taken into account.
—9
5
5
V
DD_HV_IO
= 5.0 V ± 10%, Transmission line Z = 50 ohms, t
delay
= 1 ns, C
L
= 10 pF
ns
—9
6
6
V
DD_HV_IO
= 3.3 V ± 10%, Transmission line Z = 50 ohms, t
delay
= 0.6 ns, C
L
= 10 pF
dCCTxD
01
CC Sum of delay between Clk to Q of the last FF and the
final output buffer, rising edge
—25ns
dCCTxD
10
CC Sum of delay between Clk to Q of the last FF and the
final output buffer, falling edge
—25ns
dCCTxD
10
dCCTxD
01
TxD
PE_Clk*
* FlexRay Protocol Engine Clock