Document revision history
MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors 137
2 4/2013
Package pinouts and signal descriptions (con’t)
Table 4 (LVDS pin descriptions):
• In SIPI/LFAST, Differential DSPI2, and Differential DSPI 5 groups, changed port pin
“PF[7]” to “PD[7]”
• Changed the polarity of the signal assigned to several port pins. For example, the
signal for port pin PD[7] has been changed to “SIPI_RXP” (was SIPI_RXN) and
“Interprocessor Bus LFAST, LVDS Receive Positive Terminal” (was “Interprocessor
Bus LFAST, LVDS Receive Negative Terminal”). This change affects port pins PD[7],
PF[13], PA[14], PD[6], PA[7], PA[8], PD[2], PD[3], PD[0], PD[1], PF[10], PF[9], PF[11],
PF[12], PQ[8], PQ[9], PQ[10], PQ[11], PI[14], and PI[15].
• Added package ball locations
Electrical characteristics—Miscellaneous
Section 3, Electrical characteristics:
• Thermal characteristics section has been moved to Package characteristics section.
• Following note removed: “All parameter values in this document are tested with
nominal supply voltage values (VDD_LV = 1.25 V, VDD_HV = 5.0 V ± 10%,
VDD_HV_IO = 5.0 V ± 10% or 3.3 V ± 10%) and TA = –40 to 125 °C unless otherwise
specified.”. Operating conditions will appear elsewhere in the data sheet.
• Added VDD_HV_IO_FLEX before VDD_HV_FLA in the second note on the page
Electrical characteristics—Absolute maximum ratings
Table 6 (Absolute maximum ratings):
•I
MAXD
specification now given by pad type (Medium, Strong, and Very Strong)
•I
MAXA
specification deleted.
• New specification: I
INJD
(Maximum DC injection current for digital pad)
• New specification: I
INJA
(Maximum DC injection current for analog pad)
• New specification: I
MAXSEG
(Maximum current per power segment)
• New specification: V
FERS
(Flash erase acceleration supply)
• New specification: V
DD_HV_IO_EBI
(External Bus Interface supply)
• Changed “Emulation module supply” to “BD supply” in the VDD_LV_BD – BDD_LV row
• Maximum junction temperature changed from 125 °C to 165 °C in cumulative time
limits on voltage levels for V
DD_LV
and V
DD_LV_BD
• Footnote added to V
FERS
: V
FERS
is a factory test supply pin that is used to reduce the
erase time of the flash. It is only available in bare die devices. There is no V
FERS
pin in
the packaged devices. The V
FERS
supply pad can be bonded to ground (V
SS_HV
) to
disable, or connected to 5.0 V ± 5% to use the flash erase acceleration feature. Pad
can be left at 5 V ± 5% in normal operation.
• Footnote added to V
IN
: “The maximum input voltage on an I/O pin tracks with the
associated I/O supply maximum. For the injection current condition on a pin, the
voltage will be equal to the supply plus the voltage drop across the internal ESD diode
from I/O pin to supply. The diode voltage varies greatly across process and
temperature, but a value of 0.3V can be used for nominal calculations.“
• Footnote V
DD_LV
changed: “1.32 – 1.375 V range allowed periodically for supply with
sinusoidal shape and average supply value below 1.288 V at maximum T
J = 165 °C”
(was 1.275)
Table 76. Revision history (continued)
Revision Date Description of changes
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