NXP Semiconductors MPC5777M - Page 18

MPC5777M Microcontroller Data Sheet, Rev. 6
Package pinouts and signal descriptions
NXP Semiconductors18
Differential DSPI
2
PD[2] SCK_P Differential DSPI 2 Clock,
LVDS Positive Terminal
OC18 F17
PD[3] SCK_N Differential DSPI 2 Clock,
LVDS Negative Terminal
OC17 G17
PD[0] SOUT_P Differential DSPI 2 Serial
Output, LVDS Positive
Terminal
OC16 F16
PD[1] SOUT_N Differential DSPI 2 Serial
Output, LVDS Negative
Terminal
OD17 G16
PD[7] SIN_P Differential DSPI 2 Serial
Input, LVDS Positive Terminal
IG23 P24
PF[13] SIN_N Differential DSPI 2 Serial
Input, LVDS Negative
Terminal
IH23 R24
Differential DSPI
5
PF[10] SCK_P Differential DSPI 5 Clock,
LVDS Positive Terminal
OJ24 W24
PF[9] SCK_N Differential DSPI 5 Clock,
LVDS Negative Terminal
OK23 W25
PF[12] SOUT_P Differential DSPI 5 Serial
Output, LVDS Positive
Terminal
OJ26 Y24
PF[11] SOUT_N Differential DSPI 5 Serial
Output, LVDS Negative
Terminal
OJ25 Y25
PD[7] SIN_P Differential DSPI 5 Serial
Input, LVDS Positive Terminal
IG23 P24
PF[13] SIN_N Differential DSPI 5 Serial
Input, LVDS Negative
Terminal
IH23 R24
PI[15] SIN_P Differential DSPI 5 Serial
Input, LVDS Positive Terminal
IG24 P22
PI[14] SIN_N Differential DSPI 5 Serial
Input, LVDS Negative
Terminal
IJ23 R22
1
DRCLK and TCK/DRCLK usage for SIPI LFAST and Debug LFAST are described in the MPC5777M
Microcontroller Reference Manual SIPI LFAST and Debug LFAST chapters.
2
Pads use special enable signal form DCI block: DCI driven enable for Debug LFAST pads is transparent to user.
Table 4. LVDS pin descriptions (continued)
Functional block Port pin Signal Signal description
Direction
BGA ball
(416 PD,
416 ED)
BGA ball
(512 PD,
512 ED)