NXP Semiconductors MPC5777M - Page 97

Electrical characteristics
MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors 97
Figure 31. DSPI PCS strobe (PCSS) timing (master mode)
3.16.2.1.2 DSPI CMOS Master Mode – Modified Timing
Table 52. DSPI CMOS master modified timing (full duplex and output only) – MTFE = 1, CPHA = 0 or 1
1
# Symbol Characteristic
Condition Value
2
Unit
Pad drive
3
Load (C
L
)Min Max
1t
SCK
CC SCK cycle time SCK drive strength
Very strong 25 pF 33.0 — ns
Strong 50 pF 80.0 —
Medium 50 pF 200.0 —
2t
CSC
CC PCS to SCK delay SCK and PCS drive strength
Very strong 25 pF (N
4
× t
SYS
5
)–16 —ns
Strong 50 pF (N
4
× t
SYS
5
)–16 —
Medium 50 pF (N
4
× t
SYS
5
)–16 —
PCS medium
and SCK
strong
PCS = 50 pF
SCK = 50 pF
(N
4
× t
SYS
5
)–29 —
3t
ASC
CC After SCK delay SCK and PCS drive strength
Very strong PCS = 0 pF
SCK = 50 pF
(M
6
× t
SYS
5
)–35 —ns
Strong PCS = 0 pF
SCK = 50 pF
(M
6
× t
SYS
5
)–35 —
Medium PCS = 0 pF
SCK = 50 pF
(M
6
× t
SYS
5
)–35 —
PCS medium
and SCK
strong
PCS = 0 pF
SCK = 50 pF
(M
6
× t
SYS
5
)–35 —
4t
SDC
CC SCK duty cycle
7
SCK drive strength
Very strong 0pF
1
/
2
t
SCK
–2
1
/
2
t
SCK
+2 ns
Strong 0pF
1
/
2
t
SCK
–2
1
/
2
t
SCK
+2
Medium 0pF
1
/
2
t
SCK
–5
1
/
2
t
SCK
+5
PCS strobe timing
PCSx
PCSS
t
PCSC
t
PASC