143
3. Instructions
CS/CJ/NSJ Series Instructions Reference Manual (W474)
Sequence Input Instructions
3
AND/AND NOT
Precautions
• Differentiate up (@) or differentiate down (%) can be specified for AND. If differentiate up (@) is
specified, the execution condition is turned ON for one cycle only after the status of the operand bit
goes from OFF to ON. If differentiate down (%) is specified, the execution condition is turned ON for
one cycle only after the status of the operand bit goes from ON to OFF.
• Immediate refreshing (!) can be specified for AND/AND NOT. An immediate refresh instruction
updates the status of the input bit just before the instruction is executed from the Basic Input Unit (but
not Basic Input Units on Slave Racks or for C200H Group 2 Multi-point Input Units).
• For AND, it is possible to combine immediate refreshing and up or down differentiation (!@ or !%). If
either of these is specified, the input is refreshed from the Basic Input Unit just before the instruction
is executed and the execution condition is turned ON for one cycle only after the status goes from
OFF to ON, or from ON to OFF.
With CJ2 CPU Units, AND and AND NOT can be used for bits in the DM or EM Area. For other
models of CPU Unit, AND and AND NOT cannot be used for bits in the DM or EM Area. Use AND
TST (350) instead.
Example Programming
i
0.04
0.01
0.00
0.06
0.05
AND
AND NOT
Instruction Operand
LD 0.00
AND 0.01
LD 0.02
AND 0.03
LD 0.04
AND NOT 0.05
OR LD --
AND LD --
OUT 0.06
0.03
0.02
AND
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