3. Instructions
214
CS/CJ/NSJ Series Instructions Reference Manual (W474)
Indirect Addressing of Timer/Counter Numbers
• Timer and counter numbers can be indirectly addressed using Index Registers. When Index
Registers will be used for indirect addressing, use MOVRW(561) (MOVE TIMER/COUNTER PV TO
REGISTER) to set the PLC memory address of the desired timer or counter's PV to the desired Index
Register.
• The following timers and counters can be indirectly addressed using Index Registers: TIM,
TIMX(550), TIMH(015), TIMHX(551), TTIM(087), TTIMX(555), TMHH(540), TMHHX(552),
TIMW(813), TIMWX(816), TMHW(815), TMHWX(817), CNT, CNTX(546), CNTR(012), CNTRX(548),
CNTW(814), and CNTWX(818). (These are the timers and counters that use timer and counter
numbers.)
• The timer or counter instruction will not be executed if the PLC memory address in the specified
Index Register is not the address of a timer or counter PV.
• Using Index Registers to indirectly address timers and counters can reduce the size of the program
and increase flexibility. For example, common subroutines can be created.
z Example :
• The following example shows a program section
that uses indirect addressing to define and start
100 timers with SVs contained in D100 through
D199. IR0 contains the PLC memory address of
the timer PV and IR1 contains the PLC memory
address of the timer Completion Flag.
1. MOVRW(561) moves the PLC memory
address of the PV for timer T0000 to IR0. After-
wards IR0 can be used in place of the timer
number.
2. MOVR(560) moves the PLC memory address
of the Completion Flag for timer T0000 to IR1.
3. MOVR(560) moves the PLC memory address
of CIO 2000.00 into IR2.
4. MOV(021) moves &100 into D100 for indirect
addressing of the timer SVs.
5. The content of IR0, IR1, IR2, and D0 are incre-
mented by 1 each time as this loop is executed
100 times, starting timers T0000 through
T0099.
The loop in the program above has 4 input parame-
ters which are used to start all 100 timers with this
common subroutine.
IR0 The PLC memory address of the timer's PV
IR1 The PLC memory address of the timer's
Completion Flag
IR2 The PLC memory address of the timer's exe-
cution condition
D0 The DM address of the word containing the
timer's SV
MOVRW
T0000
IR0
(Always ON Flag)
(Always ON Flag)
++
D0
1
,IR2+
MOVR
T0000
IR1
2
MOVR
2000.00
IR2
3
MOV
&100
D0
4
TIM
,IR0+
@D0
5
NEXT
FOR
&100
P_On
P_On
,IR1+
,IR2
0010
0100
0050
0999
…SV for TIM0000
…SV for TIM0001
…SV for TIM0002
…SV for TIM0099
D100
D101
D102
D199
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