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Index Registers Section 6-2
The 11-instruction subroutine on the left is equivalent to the 200-instruction
subroutine on the right.
Direct Addressing of Index Registers
Index Registers can be directly addressed only in the instructions shown in
the following table.
When execution condition "a" goes
ON (upwardly differentiated
condition), the PLC memory
addresses of D00000, D00100, and
D00200 are set in index registers IR0,
IR1, and IR2.
The following FOR-NEXT loop is not
executed unless execution condition
"a" is upwardly differentiated
(OFF→ON).
Start loop.
If execution condition "a" is ON, the
word indirectly addressed by IR0
(auto-incremented) and the word
indirectly addressed by IR1 (auto-
incremented) are added as 4-digit
signed hexadecimal values and the
result is output to the word indirectly
addressed by IR2 (auto-incremented).
Return to FOR and repeat loop.
Jump destination when execution
condition "a" is not upwardly
differentiated (OFF→ON).
MOVR
D00000
IR0
a
MOVR
D00100
IR1
MOVR
D00200
IR2
FOR
&100
Execution condition
+
,IR0+
,IR1+
,IR2+
a
Execution condition
NEXT
JME
&1000
JMP
&1000
Instruction group Instruction name Mnemonic Primary function
Data Movement Instruc-
tions
MOVE TO REGISTER MOVR(560) Stores the PLC memory address
of a bit or word in an Index Regis-
ter.
MOVE TIMER/COUNTER PV TO REG-
ISTER
MOVRW(561)
Table Data Processing
Instructions
SET RECORD LOCATION SETR(635)
GET RECORD NUMBER GETR(636) Outputs the PLC memory address
stored in an Index Register.
Data Movement Instruc-
tions
DOUBLE MOVE MOVL(498) Transfers between Index Regis-
ters. Used for exchanges and com-
parisons.
DOUBLE DATA EXCHANGE XCGL(562)
Comparison Instructions DOUBLE EQUAL =L(301)
DOUBLE NOT EQUAL < >L(306)
DOUBLE LESS THAN < L(311)
DOUBLE LESS THAN OR EQUAL < =L(316)
DOUBLE GREATER THAN >L(321)
DOUBLE GREATER THAN OR EQUAL >=L(326)
DOUBLE COMPARE CMPL(060)
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