Orolia WR-Z16 - Product Specifications

Table 2-6:
Ports LED behavior
Visual ID Behavior Description
0 wr0 wr0 corresponds to upper SFP in
the stack
B ▲ Master / Dis-
abled
Led B is disabled if this port is providing
timing to other equipment (master
mode) or disabled
▲
Active slave Led B is green when port is the active
slave that discipline the device
▲
Passive slave Led B is orange when port is in pass-
ive/monitoring mode (§5.1)
D ▲ Link down When link is down led D is disabled
▲
Link up When link is up the led D stays in green
▲
Activity Blinks in orange each time a packet is
received on this port
1 wr1 wr1 corresponds to lower SFP in
the stack
A ▼ Link down When link is down led A is disabled
▼
Link up When link is up the led A stays in green
▼
Activity Blinks in orange each time a packet is
received on this port
C ▼ Master / Dis-
abled
Led C is disabled if this port is providing
timing to other equipment (master
mode) or disabled
▼
Active slave Led C is green when port is the active
slave that discipline the device
▼
Passive slave Led C is orange when port is in pass-
ive/monitoring mode
2.4 Product Specifications
System On-Chip
SoC: Xilinx Zynq 7000 series
CPU: Dual ARM® A9 MP@ 1 GHz
Memory:
512 MB DDR3 (32-bit bus)
16GB SD Card
Physical Dimension
2.4 Product Specifications
CHAPTER 2 • WR-Z16 User Manual Rev. v3.4
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