Rigol DS2000E Series - Page 236

RIGOL Chapter 12 Store and Recall
12-20 DS2000E User’s Guide
Parallel
Clock Channel CH1
Slope Rising Edge
Bus Bits 1
Current Bit 0
Channel CH1
RS232
TX CH1
RX None
Polarity Normal
Endian LSB
Baud 9600 bps
Data Bits 8
Stop Bit 1 bit
Even-Odd Check None
Packet OFF
Packet End 00 (NULL)
I2C
SCLK CH1
SDA CH2
Include R/W Close
SPI
Decode Mode TimeOut
TimeOut 1.00 μs
SCLK Channel CH1
SCLK Slope Rising Edge
SDA Channel CH2
SDA Polarity 1 for high level
Data Bits 8
Endian MSB
CAN
Source CH1
Signal Type Rx
Baud 500 kb/s
Sample Point 50.0%