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SDI7 Dual Channel SD/HD/3G SDI Video Generator module remote commands

Returns the dro

p frame format setting for ancillary time code for the speciﬁed

generator output.

:OUTPut<1|2>

:TIMECode:LTC:STATe <Boolean>

Enables o r disables the ATC-LTC format of ancillary time code for the

speciﬁed ge

nerator output.

:OUTPut<1|2>:TIMECode:LTC :STATe?

Returns the ATC_LTC setting for ancillary time code for the speciﬁed

generator output.

:OUTPut<1|2>:TIMECode:AVI Tc:STATe <Boolean>

Enables or disables the ATC-VITC format of ancillary time code for the

speciﬁed generator output.

:OUTPut<1|2>:TIMECode:AVI Tc:STATe?

Returns the ATC_VITC setting for ancillary time code for the speciﬁed

generator output.

:OUTPut<1|2>:TIMECode:INI Tial <NR1>,<NR1>,<NR1>

Sets the initial time in hours, minutes, seconds (HH:MM:SS) of the program

time counter used for ancillary time code for the speciﬁed generator output.

This setting is valid only if:TIMECode:SOUrce is set to PCOUnter.

:OUTPut<1|2>:TIMECode:INT ial?

Returns the initial time of the program time counter used for ancillary time

code for the speciﬁed generator output.

:OUTPut<1|2>:TIMECode:SET

plies the initial time of the program time counter used for ancillary

timecodeforthespeciﬁed generator output. This command is valid only

if:TIMECode:SOUrce is set to PCOUnter.

:OUTPut<1|2>:TRIgger SYS_CLO CK|PXL_CLOCK|

FRM_PULSE|LINE_PULSE

Speciﬁes the signal available at the TRIGGER output connector. The

available choices are:

SYS_CLOCK: Low-jitter sample clock operating at 148.5 MHz for integer

frame rates and 148.35 MHz for non-integer frame rates.

PXL_CLOCK: Pixel clock which runs at the parallel data clock rate

(148.5 MHz or 148.35 MHz for 3G-SDI formats, 74.25 MHz or 74.18 MHz

forHD-SDIformats,or27MHzforSD-SDIformats).

Draft

166 TG8000 Multiformat Test Signal Generator Programmer Manual

Tektronix TG8000 Programmer's Manual

Other manuals for Tektronix TG8000