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4.1.4 PM3 ................................................................................................................ 65
4.2 Power-Management Control ............................................................................................. 65
4.3 Power-Management Registers .......................................................................................... 66
4.4 Oscillators and Clocks .................................................................................................... 69
4.4.1 Oscillators ......................................................................................................... 69
4.4.2 System Clock ..................................................................................................... 69
4.4.3 32 kHz Oscillators ................................................................................................ 70
4.4.4 Oscillator and Clock Registers .................................................................................. 70
4.5 Timer Tick Generation .................................................................................................... 72
4.6 Data Retention ............................................................................................................. 72
5 Reset ............................................................................................................................... 73
5.1 Power-On Reset and Brownout Detector .............................................................................. 74
5.2 Clock-Loss Detector ....................................................................................................... 74
6 Flash Controller ................................................................................................................ 75
6.1 Flash Memory Organization .............................................................................................. 76
6.2 Flash Write ................................................................................................................. 76
6.2.1 Flash-Write Procedure ........................................................................................... 76
6.2.2 Writing Multiple Times to a Word ............................................................................... 77
6.2.3 DMA Flash Write ................................................................................................. 77
6.2.4 CPU Flash Write .................................................................................................. 78
6.3 Flash Page Erase ......................................................................................................... 78
6.3.1 Performing Flash Erase From Flash Memory ................................................................ 79
6.3.2 Different Flash Page Size on CC2533 ......................................................................... 79
6.4 Flash DMA Trigger ........................................................................................................ 79
6.5 Flash Controller Registers ................................................................................................ 79
7 I/O Ports ........................................................................................................................... 81
7.1 Unused I/O Pins ........................................................................................................... 82
7.2 Low I/O Supply Voltage ................................................................................................... 82
7.3 General-Purpose I/O ...................................................................................................... 82
7.4 General-Purpose I/O Interrupts .......................................................................................... 82
7.5 General-Purpose I/O DMA ............................................................................................... 83
7.6 Peripheral I/O .............................................................................................................. 83
7.6.1 Timer 1 ............................................................................................................. 84
7.6.2 Timer 3 ............................................................................................................. 84
7.6.3 Timer 4 ............................................................................................................. 84
7.6.4 USART 0 ........................................................................................................... 85
7.6.5 USART 1 ........................................................................................................... 85
7.6.6 ADC ................................................................................................................ 86
7.6.7 Operational Amplifier and Analog Comparator ............................................................... 86
7.7 Debug Interface ............................................................................................................ 86
7.8 32-kHz XOSC Input ....................................................................................................... 86
7.9 Radio Test Output Signals ............................................................................................... 86
7.10 Power-Down Signal MUX (PMUX) ...................................................................................... 86
7.11 I/O Registers ............................................................................................................... 87
8 DMA Controller ................................................................................................................. 95
8.1 DMA Operation ............................................................................................................ 96
8.2 DMA Configuration Parameters ......................................................................................... 98
8.2.1 Source Address ................................................................................................... 98
8.2.2 Destination Address .............................................................................................. 98
8.2.3 Transfer Count .................................................................................................... 98
8.2.4 VLEN Setting ...................................................................................................... 98
8.2.5 Trigger Event ...................................................................................................... 99
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Contents SWRU191C–April 2009–Revised January 2012
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