190
* XT2OFF -- Disable XT2CLK
* ~XTS -- Low Frequency
* DIVA_0 -- Divide by 1
*
* Note: ~XTS indicates that XTS has value zero
*/
BCSCTL1 |= XT2OFF | DIVA_0;
/*
* Basic Clock System Control 3
*
* XT2S_0 -- 0.4 - 1 MHz
* LFXT1S_2 -- If XTS = 0, XT1 = VLOCLK ; If XTS = 1, XT1 = 3 - 16-MHz crystal
or resonator
* XCAP_1 -- ~6 pF
*/
BCSCTL3 = XT2S_0 | LFXT1S_2 | XCAP_1;
/* USER CODE START (section: BCSplus_graceInit_epilogue) */
/* User code */
/* USER CODE END (section: BCSplus_graceInit_epilogue) */
}
void ADC10_graceInit(void)
{
/* USER CODE START (section: ADC10_graceInit_prologue) */
/* User initialization code */
/* USER CODE END (section: ADC10_graceInit_prologue) */
/* disable ADC10 during initialization */
ADC10CTL0 &= ~ENC;
/*
* Control Register 0
*
* ~ADC10SC -- No conversion
* ~ENC -- Disable ADC
* ~ADC10IFG -- Clear ADC interrupt flag
* ~ADC10IE -- Disable ADC interrupt
* ADC10ON -- Switch On ADC10
* ~REFON -- Disable ADC reference generator
* ~REF2_5V -- Set reference voltage generator = 1.5V
* MSC -- Enable multiple sample and conversion
* ~REFBURST -- Reference buffer on continuously
* ~REFOUT -- Reference output off
* ~ADC10SR -- Reference buffer supports up to ~200 ksps
* ADC10SHT_2 -- 16 x ADC10CLKs
* SREF_0 -- VR+ = VCC and VR- = VSS
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
ADC10CTL0 = ADC10ON | MSC | ADC10SHT_2 | SREF_0;
/*
* Control Register 1
*
* ~ADC10BUSY -- No operation is active
* CONSEQ_2 -- Repeat single channel