106
TMS570LS0714
SPNS226E –JUNE 2013–REVISED NOVEMBER 2016
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Peripheral Information and Electrical Specifications Copyright © 2013–2016, Texas Instruments Incorporated
Table 7-15. eQEPx Clock Enable Control
eQEP MODULE INSTANCE
CONTROL REGISTER TO
ENABLE CLOCK
DEFAULT VALUE
eQEP1 PINMMR40[16] 1
eQEP2 PINMMR40[24] 1
(1) The filter width is 6 VCLK4 cycles.
7.4.2 Using eQEPx Phase Error to Trip ePWMx Outputs
The eQEP module sets the EQEPERR signal output whenever a phase error is detected in its inputs
EQEPxA and EQEPxB. This error signal from both the eQEP modules is input to the connection selection
multiplexer. This multiplexer is defined in Table 7-7. As shown in Figure 7-3, the output of this selection
multiplexer is inverted and connected to the TZ4n trip-zone input of all EPWMx modules. This connection
allows the application to define the response of each ePWMx module on a phase error indicated by the
eQEP modules.
7.4.3 Input Connections to eQEPx Modules
The input connections to each of the eQEP modules can be selected between a double-VCLK4-
synchronized input or a double-VCLK4-synchronized and filtered input, as shown in Table 7-16.
Table 7-16. Device-Level Input Connection to eQEPx Modules
INPUT SIGNAL
CONTROL FOR
DOUBLE-SYNCHRONIZED
CONNECTION TO eQEPx
CONTROL FOR
DOUBLE-SYNCHRONIZED AND
FILTERED CONNECTION TO eQEPx
(1)
eQEP1A PINMMR44[18:16] = 001 PINMMR44[18:16] = 010
eQEP1B PINMMR44[26:24] = 001 PINMMR44[26:24] = 010
eQEP1I PINMMR45[2:0] = 001 PINMMR45[2:0] = 010
eQEP1S PINMMR45[10:8] = 001 PINMMR45[10:8] = 010
eQEP2A PINMMR45[18:16] = 001 PINMMR45[18:16] = 010
eQEP2B PINMMR45[26:24] = 001 PINMMR45[26:24] = 010
eQEP2I PINMMR46[2:0] = 001 PINMMR46[2:0] = 010
eQEP2S PINMMR46[10:8] = 001 PINMMR46[10:8] = 010
(1) The filter width is 6 VCLK4 cycles.
7.4.4 Enhanced Quadrature Encoder Pulse (eQEPx) Timing
Table 7-17. eQEPx Timing Requirements
(1)
TEST CONDITIONS MIN MAX UNIT
t
w(QEPP)
QEP input period Synchronous 2 t
c(VCLK4)
cycles
Synchronous with input filter 2 t
c(VCLK4)
+ filter width
t
w(INDEXH)
QEP Index Input High Time Synchronous 2 t
c(VCLK4)
cycles
Synchronous with input filter 2 t
c(VCLK4)
+ filter width
t
w(INDEXL)
QEP Index Input Low Time Synchronous 2 t
c(VCLK4)
cycles
Synchronous with input filter 2 t
c(VCLK4)
+ filter width
t
w(STROBH)
QEP Strobe Input High Time Synchronous 2 t
c(VCLK4)
cycles
Synchronous with input filter 2 t
c(VCLK4)
+ filter width
t
w(STROBL)
QEP Strobe Input Low Time Synchronous 2 t
c(VCLK4)
cycles
Synchronous with input filter 2 t
c(VCLK4)
+ filter width
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