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TMS570LS0714
SPNS226E –JUNE 2013–REVISED NOVEMBER 2016
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Peripheral Information and Electrical Specifications Copyright © 2013–2016, Texas Instruments Incorporated
7.7.5.2 Output Monitoring Using Dual Clock Comparator (DCC)
N2HET1[31] is connected as a clock source for counter 1 in DCC1. This allows the application to measure
the frequency of the PWM signal on N2HET1[31].
Similarly, N2HET2[0] is connected as a clock source for counter 1 in DCC2. This allows the application to
measure the frequency of the PWM signal on N2HET2[0].
Both N2HET1[31] and N2HET2[0] can be configured to be internal-only channels. That is, the connection
to the DCC module is made directly from the output of the N2HETx module (from the input of the output
buffer).
For more information on DCC, see Section 6.7.3.
7.7.6 Disabling N2HET Outputs
Some applications require disabling the N2HET outputs under some fault condition. The N2HET module
provides this capability through the Pin Disable input signal. This signal, when driven low, causes the
N2HET outputs identified by a programmable register (HETPINDIS) to be in a high-impedance (tri-state)
state. For more details on the N2HET Pin Disable feature, see the device-specific Terminal Reference
Manual.
GIOA[5] is connected to the Pin Disable input for N2HET1, and GIOB[2] is connected to the Pin Disable
input for N2HET2.
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