5a-19
Theory of Operation
A30 Pager Encoder (8648A Option 1EP)
A30 Pager Encoder (8648A Option 1EP)
The encoder contains the DSP (digital signal processor), memory, DAC, serial I/O for the
other assemblies, timebase, and output filters. The pager encoder generates FLEX,
FLEX-TD, or POCSAG formatted 2-level or 4-level FSK signals. It also generates
variable-frequency sine, square, triangle, and saw (or ramp) waveforms. When the
instrument is either in the pager encoding settings state or using the variable
frequency/waveform source, the encoder will work as an internal modulation source
connected to the MOD INPUT/OUTPUT port. The modulated signal can be monitored
from the MOD INPUT/OUTPUT port as a 2 Vp-p signal.
This assembly has a serial communication port and communicates with the main
controller on the A3 motherboard through this port. The calibration data for the encoder
output level is stored in EEPROM on this assembly.
The memory consists of EEPROM, SRAM, and flash memory. The flash memory stores the
long pager message which will be generated by an external controller.
To achieve precise timing accuracy for pager protocol, the encoder has its own timebase
unit (TCXO).
The DAC output signal is filtered by either the 10th order Bessel low-pass filter (−3 dB at
3.9 kHz) or a 50 kHz cut-off, low-pass filter.
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