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Configuring Multi-chassis Link Aggregation MC-LAG Packet Flow
OmniSwitch AOS Release 7 Network Configuration Guide March 2011 page 8-19
MC-LAG prevents MAC
A
from being learned on the VFL ports of switch M
2
but shows MAC
A
as learned
on the L
A
aggregate even though the original ARP request packet was actually received through the VFL.
The MAC addresses learned on MC-LAG ports in one switch are learned on the same MC-LAG ports on
the peer switch.
4 Step 4: ARP Reply
Switches M
1
and M
2
do not respond to the ARP request because the destination IP address (IP
B
) is not
an IP address of any of either of their IP interfaces.
Eventually, the ARP request will reach the destination host B, which will respond to the ARP request
as indicated below.
ARP Reply Over MC-LAG
The ARP reply is a unicast packet as follows.
Source MAC = MAC
B
Destination MAC = MAC
A
5 Step 5: MAC
B
Learning
As the ARP reply packet traverses the system on its way back via the path Host B ==> S
2
==> M
1
=> S
1
=> Host A, the MAC
B
address is learned by the M
1
switch on the aggregate L
B
.
6 Step 6: Regular Traffic Flow
The packet eventually reaches the Host A. From this moment on, Host A will be able to communicate with
Host B using IP over the Layer 2 multi-path infrastructure provided by the MC-LAG aggregates.
Key Points
The MC-LAG peers perform only Layer 2 switching and learning operations despite the fact that actual
traffic flowing between the hosts is IP-based.
MAC addresses learned on an MC-LAG aggregate on one of the MC-LAG peers are also learned on
the other peer on the same MC-LAG aggregate.
M
1
S
1
MC-LAG-A
M
2
S
2
Host B
(MAC
B
, IP
B
)
MC-LAG-B
ARP Reply
L
A1
L
A2
L
B1
L
B2
MAC Table
MAC
A
L
A
MAC
B
L
B
MAC Table
MAC
A
L
A
PC
PC

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