Glossary
ARM DDI 0432C Copyright © 2009 ARM Limited. All rights reserved. Glossary-3
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Byte-invariant In a byte-invariant system, the address of each byte of memory remains unchanged
when switching between little-endian and big-endian operation. When a data item
larger than a byte is loaded from or stored to memory, the bytes making up that data item
are arranged into the correct order depending on the endianness of the memory access.
The ARM architecture supports byte-invariant systems in ARMv6 and later versions.
Core A core is that part of a processor that contains the ALU, the datapath, the
general-purpose registers, the Program Counter, and the instruction decode and control
circuitry.
Debug Access Port (DAP)
A TAP block that acts as an AMBA, AHB or AHB-Lite, master for access to a system
bus. The DAP is the term used to encompass a set of modular blocks that support system
wide debug. The DAP is a modular component, intended to be extendable to support
optional access to multiple systems such as memory mapped AHB and APB through a
single debug interface.
Debugger A debugging system that includes a program, used to detect, locate, and correct
software faults, together with custom hardware that supports software debugging.
Endianness Byte ordering. The scheme that determines the order that successive bytes of a data
word are stored in memory. An aspect of the system’s memory mapping.
See also Little-endian and Big-endian.
Exception An error or event which can cause the processor to suspend the currently executing
instruction stream and execute a specific exception handler or interrupt service routine.
The exception could be an external interrupt or NMI, or it could be a fault or error event
that is considered serious enough to require that program execution is interrupted.
Examples include attempting to perform an invalid memory access, external interrupts,
and undefined instructions. When an exception occurs, normal program flow is
interrupted and execution is resumed at the corresponding exception vector. This
contains the first instruction of the interrupt service routine to deal with the exception.
Halfword A 16-bit data item.
Implementation-defined
The behavior is not architecturally defined, but is defined and documented by
individual implementations.
Joint Test Action Group (JTAG)
The name of the organization that developed standard IEEE 1149.1. This standard
defines a boundary-scan architecture used for in-circuit testing of integrated circuit
devices. It is commonly known by the initials JTAG.
JTAG See Joint Test Action Group.
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