Broadcom BCM7405 - Figure 1-31: EBI Synchronous Write Cycle between Two PCI Cycles

2/24/2008 9T6WP
BCM7405 Preliminary Hardware Data Module
Functional Description 06/29/07
Broadcom Corporation
Page 1-88 Peripherals Document 7405-1HDM00-R
Figure 1-31: EBI Synchronous Write Cycle Between Two PCI Cycles
PCI_CLK
PCI_AD[15:0]
(EBI_DATA[15:0])
PCI_IRDYb
(EBI_ADDR[21])
PCI_TRDYb
(EBI_TAb)
PCI_DEVSELb
(EBI_ADDR[23])
PCI_FRAMEb
EBI Address
EBI_TSb
EBI_DSb
EBI_RDb[1:0]
EBI_WEb[1:0]
PCI_AD[31:16]
(EBI_ADDR[15:0])
PCI_CBE[3:0]
(EBI_ADDR[19:16])
EBI_CSb
PCI_STOPb
(EBI_ADDR[22])
EBI Address
PCI
Addr
PCI
Addr
PCI
CMD
PCI Data
PCI Data
PCI Byte Enable
PCI
Addr
PCI
Addr
PCI
CMD
PCI Data
PCI Byte Enable
Sync Mode EBI Write CyclePCI Write Cycle PCI Read Cycle
PCI
Data
EBI Data
EBI Address
EBI Valid Tsize EBI_TSIZE[1:0]
EBI_ADDR[25:24]
PCI_REQb
PCI_GNTb
EBI_REQb
EBI_GNTb
Deassert PCI_GNTb and
ready to grant EBI when
PCI bus is idle