Broadcom BCM7405 - DDR Interface Timing; Figure 1-48: Write Cycle Timing; Figure 1-49: Read Cycle Timing

2/24/2008 9T6WP
Preliminary Hardware Data Module BCM7405
06/29/07 Timing and AC Characteristics
Broadcom Corporation
Document 7405-1HDM00-R DDR Interface Timing Page 1-163
DDR INTERFACE TIMING
Figure 1-48: Write Cycle Timing
Figure 1-49: Read Cycle Timing
CLK / CLKb
COMMAND
ADRS/BSx
Ts
Th Ts
Tdqss
DQS
DQ
DQM
Th
Tdpwo
DQS
DQ
CLK / CLKb
COMMAND
ADRS/BSx
Tdv_read
Th
Ts
Tdpwi