Broadcom BCM7405 - Figure 1-38: MPOD Output Timing; Table 1-24: MPOD Output Timing Parameters

2/24/2008 9T6WP
Preliminary Hardware Data Module BCM7405
06/29/07 Timing and AC Characteristics
Broadcom Corporation
Document 7405-1HDM00-R MPOD Output Timing Page 1-153
MPOD OUTPUT TIMING
Figure 1-38: MPOD Output Timing
Table 1-24: MPOD Output Timing Parameters
Description Symbol Min. Max. Units
o_MPOD_CLK clock frequency F – 54 MHz
o_MPOD_CLK clock rise time
1,2
Trise–2ns
o_MPOD_CLK clock fall time
1,2
Tfall–2ns
o_MPOD_DATA, o_MPOD_SYNC Setup Time to o_MPOD_CLK active
edge (rising and falling)
3
Tsu3–ns
o_MPOD_DATA, o_MPOD_SYNC Hold Time to o_MPOD_CLK active
edge (rising and falling)
3
Thd3––
1
All output AC timing is based upon a 20 pF load.
2
Rise and Fall time specs are measured from the 10% and 90% VDD levels.
3
Active clock edge is programmable. Active edge is falling by default, but may be inverted to use rising edge.
o_MPOD_CLK
o_MPOD_SYNC,
o_MPOD_DATA[1:0]
T
s
u
T
h
d
T
s
u
T
h
d