Broadcom BCM7405 - Power Features; Table 1-17: Power Estimate; Table 1-18: Power Configuration Example

2/24/2008 9T6WP
Preliminary Hardware Data Module BCM7405
06/29/07 Functional Description
Broadcom Corporation
Document 7405-1HDM00-R Power Features Page 1-93
POWER FEATURES
The BCM7405 has been designed with some power saving features. To save power, the clock to sections of the chip can
be turned off. Other possible power savings are currently being examined.
Table 1-17 illustrates the power saving options based on just the clocking feature. Transport, memory controller, GPIO,
remote controls, and CPU are assumed operational in low power mode.
Within the clock module, there is a single register that allows the clocks to be disabled (glitchlessly turned off). Software must
ensure that the target module is in an idle state before disabling the clock to it. To accomplish the power saving modes in
Table 1-17, employ the setting in Table 1-18.
POWER MODES FOR DDR DRAM MEMORY CONTROLLER
It is possible to configure each of the DDR DRAM Memory Controllers to go into a Self-refresh mode to further reduce the
power consumption. The following steps describe how to enable the Self-refresh mode for the memory controller.
1 The CPU sets programmable POWER_SAVE_MODE and IDLE_PERIOD values. The POWER_SAVE_MODE is
required to be set to enable self-refresh based power saving. The IDLE_PERIOD number of DDR clocks inactivity that
triggers the Power Save mode.
Table 1-17: Power Estimate
Mode of Operation Estimated Power (Watts)
Normal Operation TBD
Sleep/Low Power TBD
Table 1-18: Power Configuration Example
Module Normal Operation Sleep
Data Transport 1 1
Audio Decoder 1 0
AVC/MPEG/VC-1 Decoder 1 0
RF Modulator 1 0
Ethernet 1 0
Memory-to-Memory Compositor 1 0
Video Engine (BVN) 1 0
SATA 1 0
Soft Modem 1 0
USB 1 0
GPIO 1 1
CPU 1 1
Note: The first access to the memory controller automatically leaves the self-refresh mode.