2/24/2008 9T6WP
Preliminary Hardware Data Module BCM7405
06/29/07 Hardware Signal Descriptions
Broadcom Corporation
Document 7405-1HDM00-R Pin Definition Notations Page 1-125
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
CLK54_XVDD
25_0
APWR – 2.5 – D32 CLK54 XTAL Power Supply
(2.5V +5% / -5%)
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
CLK54_XVDD
25_1
APWR – 2.5 – D33 CLK54 XTAL Power Supply
(2.5V +5% / -5%)
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
XTAL_VDD12 APWR – 1.2 – D34 CLK54 XTAL Power Supply
(1.2V +5% / -5%)
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
CLK54_XVSS
_0
AGND – GND – F31 CLK54 XTAL Ground
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
CLK54_XVSS
_1
AGND – GND – F30 CLK54 XTAL Ground
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
CLK54_XVSS
_2
AGND – GND – G30 CLK54 XTAL Ground
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
PLL_AVDD12
_0
APWR – 1.2 – F32 PLL Power Supply (1.2V
+5% / -5%)
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
PLL_AVSS_0 AGND – GND – H30 PLL Ground
1 11 - UHF/Video/HDMI/
RFM/AUDIO/...
PLL_AVDD12
_1
APWR – 1.2 – G31 PLL Power Supply (1.2V
+5% / -5%)
1 12 - Clocks CLK27_OUT O – 5 12 AL13 27 MHz output. Shared with
33 MHz clock output
1 12 - Clocks VCXO27A O – 3.3 8 AK14 27 MHz VXCO output clock
EJTAG – 7
1 8 - EJTAG/BroadBand
Studio
EJTAG_TRST
b
I PD 3.3 – C33 JTAG reset
1 8 - EJTAG/BroadBand
Studio
EJTAG_TMS I PU 3.3 – A34 JTAG test mode select.
1 8 - EJTAG/BroadBand
Studio
EJTAG_TCK I PU 3.3 – B33 JTAG test clock.
1 8 - EJTAG/BroadBand
Studio
EJTAG_TDI I PU 3.3 – B34 JTAG test data input.
1 8 - EJTAG/BroadBand
Studio
EJTAG_TDO O Ext PU 3.3 8 C32 JTAG test data output
1 8 - EJTAG/BroadBand
Studio
EJTAG_CE0 I PD 3.3 – C34 Select between JTAG and
EJTAG functions
1 8 - EJTAG/BroadBand
Studio
EJTAG_CE1 I PD 3.3 – A33 Select between JTAG and
EJTAG functions
Test Clocks – 8
1 12 - Clocks BYP_SYS9_C
LK
I/O PD 3.3 – F28 Bypass for system 9 MHz
clock. Shared with MDIO for
SATA
1 12 - Clocks BYP_RFM_PL
LO
I PD 3.3 – G26 Bypass for RFM PLLO
clock
1 12 - Clocks BYP_CPU_CL
K
I PD 3.3 – F26 Bypass for CPU clock
Table 1-19: Pin Descriptions (Cont.)
# of
Pins
Orcad Schematic
Block
Label I/O Res.
Tol.
(V)
Drv.
(mA)
Loc. Description