Epson TM-U675 - Page 242

Appendix D-54 Product Overview Rev.D
Confidential
The host interface reset signal (DSR signal and pin 25 input signal) is connected through DSW
2-7 and 2-8. When the reset signal (LOW) is applied here, the printer is reset. In the reset status,
the CPU and GA are initialized, but the power remains on, and this status differs from when the
power is turned on again. It is necessary to keep this in mind. The reset circuit is shown below.
Figure D-49
VCC
RESET
DSW2-7
DSW2-8
U1
PST596
M/R
1
SUB
2
GND
3
VOUT
4
VCC
5
C3
0.1uF
12
Q1
DTA114EK
2
3
1
DA1
DAP202
1
3
2
R2
10K
12