5730A
Operators Manual
6-52
Status Byte Register
The most important and frequently used register is the Status Byte Register, which is how
the 5730A Calibrator responds to a serial poll. This byte is cleared (set to 0) when the
power is turned on. A serial poll cannot be done if the RS-232C/USB/Ethernet port is
used as the remote control interface. Instead, the *STB? command can be sent to get the
same information. Its bits are defined as follows (bits 7, 1, and 0 are always 0):
7 6 5 4 3 2 1 0
0 RQS ESB MAV EAV ISCB 0 0
MSS
RQS Requesting Service. The RQS bit is set to 1 whenever bits ESB , MAV, EAV, or
ISCB change from 0 to 1 and are enabled (1) in the SRE. When RQS is 1, the
Calibrator asserts the SRQ control line on the IEEE-488 interface. A serial poll
can be done to read this bit to see if the Calibrator is the source of an SRQ.
MSS Master Summary Status. Set to 1 whenever bits ESB, MAV, EAV, or ISCB are 1
and enabled (1) in the SRE. This bit can be read with the *STB? command in
RS-232C/USB/Ethernet remote control in place of doing a serial poll.
ESB Set to 1 when one or more enabled ESR bits are 1.
MAV Message Available. The MAV bit is set to 1 whenever data is available in the
Calibrator IEEE-488 interface output buffer.
EAV Error (fault) available. A fault has occurred and a fault code is available through
the FAULT? query.
ISCB One or more enabled ISCR bits are 1.
Service Request Line (SRQ)
Service Request (SRQ) is an IEEE-488.1 bus control line that the Calibrator asserts to
notify the controller that it requires some type of service. Many instruments can be on the
bus, but they all share a single SRQ line. To determine which instrument set SRQ, the
Controller normally does a serial poll of each instrument. The Calibrator asserts SRQ
whenever the RQS bit in its Status Byte Register is 1. This bit informs the controller that
the Calibrator was the source of the SRQ.
The Calibrator clears SRQ and RQS when the controller does a serial poll of the
Calibrator IEEE-488 interface, sends *CLS, or when the MSS bit is cleared. The MSS bit
is cleared only when ESB, MAV, EAV, and ISCB are 0, or they are disabled by their
associated enable bits in the SRE register being set to 0.
Service Request Enable Register
The Service Request Enable Register (SRE) enables or masks the bits of the Status Byte
Register. The SRE is cleared at power up. Refer to “Status Byte Register” for the bit
functions.
Load the SRE
By resetting (to 0) the bits in the SRE, associated bits in the Status Byte Register can
masked (disabled). Bits set to 1 enable the associated bit in the Status Byte Register.
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