System Management Intel® 5000 Series Chipsets Server Board Family Datasheet
Revision 1.1
Intel order number D38960-004
114
4.13.1 Processor Status Sensors
The BMC provides IPMI sensor of type Processor for monitoring various status information for
each processor slot supported by the platform.
With the exception of the processor presence offset, if an event state (sensor offset) has been
asserted, it will remain asserted until one of the following occurrences:
The processor retest option is enabled in BIOS setup.
A/C power cycle occurs.
DC power-on and system resets do not re-arm processor status sensors.
Table 41. Requirements for Processor Status
Processor Status Detected By
IERR BMC
Thermal trip BMC
FRB2 / Hang in POST failure BIOS
1
Configuration error (for instance, stepping mismatch) BIOS
Processor presence detected BMC
Note 1: A fault is not reflected in the processor status sensor on platforms that use one of the Intel
®
5000 Series
Chipsets
4.13.1.1 Processor Presence
When the BMC detects an empty processor socket, it sets the disable bit in the processor status
for that socket and clears the remaining status bits, including any persistent bits.
Upon BMC initialization, the BMC checks to see if the processor is present. One event should
be logged for processor presence at BMC initialization for each installed processor.
4.13.2 Processor VRD Over-Temperature Sensor
This sensor monitors a signal that indicates if a processor VRD is running over the temperature
limit. The state of this signal is an input into the National Semiconductor* LM94 system
management controller, which asserts the associated Prochot signal and effectively lowers the
VRD temperature. The state of the signal is not an input into the system fan control sub-system.
This relationship is 1:1; if VRD-hot is asserted, then Prochot will assert.