Intel 5000 Series User Manual

Intel® 5000 Series Chipsets Server Board Family Datasheet Functional Architecture
Revision 1.1
Intel order number D38960-004
23
2.5 Clock Generation and Distribution
All buses on the Intel
®
server and workstation boards that use the Intel
®
5000 MCH operate
using synchronous clocks. Clock synthesizer/driver circuitry on the server board generates
clock frequencies and voltage levels as required, including the following:
 200-MHz differential clock at 0.7V logic levels. For processor 1, processor 2, debug port,
and the Intel
®
5000 MCH.
 100-MHz differential clock at 0.7V logic levels on CK409B. For the DB800 clock buffer.
 100-MHz differential clock at 0.7 Vlogic levels on DB800. For the PCI Express* device
this is the Intel
®
5000 MCH, which includes x4 PCI Express slot. For SATA this is the
Intel
®
631xESB / 632xESB I/O Controller Hub ICH6.
 66 MHz at 3.3V logic levels: for 5000 North Bridge and the Intel
®
631xESB / 632xESB
I/O Controller Hub ICH6.
 48 MHz at 3.3V logic levels: for Intel
®
631xESB / 632xESB I/O Controller Hub ICH6 and
SIO.
 33 MHz at 3.3V logic levels: for the Intel
®
631xESB / 632xESB I/O Controller Hub ICH6,
video, BMC, and SIO.
 14.318 MHz at 2.5V logic levels: For the Intel
®
631xESB / 632xESB I/O Controller Hub
ICH6 and video.
 10 Mhz at 5V logic levels: For the BMC.
The PCI-X slot speed on the full-length riser card is determined by the riser card in use.

Intel 5000 Series Specifications

General

Brand	Intel
Model	5000 Series
Category	Server Board
Language	English