Intel® 5000 Series Chipsets Server Board Family Datasheet System BIOS
Revision 1.1
Intel order number D38960-004
29
3.2.13 Execute Disable Bit Feature
The Execute Disable Bit feature (XD bit) is an enhancement to the IA-32 Intel
®
architecture. An
IA-32 processor that supports the Execute Disable Bit feature can prevent data pages from
being used by malicious software to execute code. An IA-32 processor with the XD bit feature
can provide memory protection in either of the following modes:
Legacy protected mode if the Physical Address Extension (PAE) is enabled.
IA-32e mode when 64-bit extension technology is enabled (Entering IA-32e mode
requires enabling PAE).
The XD bit does not introduce any new instructions, it requires operating systems to operate in
a PAE-enabled environment and establish a page-granular protection policy for memory. The
XD bit can be enabled and disabled in BIOS Setup. The default behavior is enabled.
3.2.14 Enhanced Halt State (C1E)
All processors support the Halt State (C1) through the native processor instructions HLT and
MWAIT. Some processors implement an optimization of the C1 state called the Enhanced Halt
State (C1E) to further reduce the total power consumption while in C1. When C1E is enabled,
and all logical processors in the physical processors have entered the C1 state, the processor
will reduce the core clock frequency to system bus ratio and VID. The transition of the physical
processor from C1 to C1E is accomplished similar to an Enhanced Intel SpeedStep
®
Technology transition. If the BIOS determines all the system processors support C1E, then it is
enabled.
3.2.15 Multi-Core Processor Support
The BIOS does the following:
Initializes all processor cores
Installs all NMI handlers for all dual core processors
Leaves initialized AP in CLI/HLT loop
Initializes stack for all APs
BIOS Setup provides an option to selectively enable or disable multi-core processor support.
The default behavior is enabled.
The BIOS creates additional entries in the ACPI MP tables to describe the dual core
processors. The SMBIOS Type 4 structure shows only the physical processors installed. It does
not describe the virtual processors.
The BIOS will create entries in the multi-processor specification tables to describe dual core
processors.
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