Intel® 5000 Series Chipsets Server Board Family Datasheet Functional Architecture
Revision 1.1
Intel order number D38960-004
13
TP02091
Heatsink assembly
Thermal Interface
Material (TIM)
Server Board
CEK Spring
Chassis
AF000196
Figure 2. CEK Processor Mounting
2.3 Memory Sub-system
The Intel
®
boards that use the Intel
®
5000 MCH support several fully-buffered (FBD) memory
modes of operation.
Single-channel mode (single DIMM mode)
Single-branch / dual-channel mode
Dual-branch / dual-channel mode (four channels)
Memory sparing mode
Memory mirroring mode
Note: Memory sparing and mirroring features are currently disabled and will be made available
after production launch.
The Intel
®
5000 MCH provides an integrated memory controller for direct connection to four
channels routed to eight connectors supporting registered DDR2-533 and DDR2-667 FBDIMM
memory (stacked or unstacked). Peak theoretical memory data bandwidth is 6.4 GB/s with
DDR2-533 and 8.0 GB/s with DDR2-667.
A pair of channels is a branch. Branch 0 consists of channel A and channel B, Branch 1
consists of channel C and channel D. A DIMM can have two ranks; a channel supports a
maximum of eight ranks.
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