Intel 5000 Series

Intel® 5000 Series Chipsets Server Board Family Datasheet System Management
Revision 1.1
Intel order number D38960-004
135
Figure 8 shows a logical block diagram of the BMC receiving IPMB messages.
IPMB
LUN ROUTING
IPMB MSG VERIFICATION
I2C INTERFACE
LUN=00b
(BMC)
LUN=10b
(SMS)
Other BMC
Commands
SMM Interface
Event Message
Buffer
SMM_ATN
Flag
Read Event
Msg
BMC IPMB
MSG Handler
SEL
DEVICE
SMS Interface
RECEIVE
MSG QUEUE
SMS_ATN
Flag
Get Msg
Cmd
Figure 25. BMC IPMB Message Reception