Intel® 5000 Series Chipsets Server Board Family Datasheet System BIOS
Revision 1.1
Intel order number D38960-004
35
3.3.7.2 Memory Upgrade Rules
Upgrading the system memory requires careful positioning of the FBDIMMs, based on the
following factors:
The current mode of operation
The existing FBDIMM population
The FBDIMM characteristics
The optimization techniques used by the Intel® 5000 MCH to maximize FBD bandwidth.
In dual-channel mode, the adjacent channels of a branch work in lock-step to provide increase
in FBD bandwidth. Channel A and Channel B are lock-stepped when Branch 0 is configured to
support dual-channel mode, Channel C and Channel D are lock-stepped when Branch 1 is
configured for lock-step.
In single-channel mode, only Channel A, Branch 0 can be active. In this mode, Branch 1 is
always disabled. Accordingly, only FBDIMMs on Channel A are enabled. All other FBDIMMs are
disabled.
The following are the general rules to be observed when selecting and configuring memory to
obtain the best performance from the system.
Rule 1: Branch 0 is always given precedence over Branch 1 in determining the mode of
operation. Therefore, if Branch 0 cannot support the dual-channel mode of operation, the
BIOS will configure the system for single-channel mode, regardless of the mode(s) that
Branch 1 can support.
Rule 2: The FBDIMM population of Slot 1 on Branch 0 determines the mode that is
selected. If DIMM_A1 and DIMM_B1 cannot lock-step, then the system reverts to single-
channel mode, with DIMM_B1 disabled.
Rule 3: Single-channel mode is always given preference over dual-channel mode if the
configuration on Slot 1, Branch 0 is not in balance (if DIMM_A1 and DIMM_B1 are not
identical.)
Rule 4: DIMM_A1 must be populated. In addition, the BIOS will always select the mode
of operation that best matches the requirements of DIMM_A1, such that it is always
enabled and used for runtime memory. For example, in an FBDIMM population that has
Branch 0 with only DIMM_A1 populated, the BIOS will forcibly initialize and configure
single-channel mode with only DIMM_ A1 enabled, regardless of the number of
FBDIMMs populated on Branch 1. Such a method of upgrading system memory is,
therefore, incorrect, and results in a reduced-capacity operation. It must, therefore, be
avoided.
Rule 5: DIMM_A1 is the minimum possible FBDIMM configuration. In this configuration,
the memory operates in single-channel mode, and no RAS features are possible.
Rule 6: The minimum memory population for enabling Branch 1 is four FBDIMMs:
DIMM_A1, DIMM_B1, DIMM_C1 and DIMM_D1.
Rule 7: For a branch to operate in lock-step (dual-channel mode), the FBDIMMs in
socket positions on adjacent channels of the branch must be identical in terms of timing,
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