Keysight 34972A - Page 277

Tutorial 7
Keysight 34970A/34972A User’s Guide 277
When you apply power to the internal DMM, it measures the power-line frequency
(50 Hz or 60 Hz), and uses this measurement to determine the integration time.
The table below shows the noise rejection achieved with various configurations.
For better resolution and increased noise rejection, select a longer integration
time.
The following graph shows the attenuation of AC signals measured in the DC
voltage function for various A/D integration time settings. Note that signal
frequencies at multiples of 1/T exhibit high attenuation.
PLCs Digits Bits
Integration Time
60 Hz (50 (Hz)
NMR
0.02
0.2
1
2
10
20
100
200
4½
5½
5½
6½
6½
6½
6½
6½
15
18
20
21
24
25
26
26
400 μs (400 μs)
3 ms (3 ms)
16.7 ms (20 ms)
33.3 ms (40 ms)
167 ms (200 ms)
333 ms (400 ms)
1.67 s (2 s)
3.33 s (4 s)
0 dB
0 dB
60 dB
90 dB
95 dB
100 dB
105 dB
110 dB
Signal Frequency x T
Signal Gain
0 dB
-10 dB
-20 dB
-30 dB
-40 dB
0.1
1
10