X-Stream Operator’s Manual
WM-OM-E Rev I 427
optimizing equalization. Lower SAM values mean worse error rates.
The range of SAM values depends on the PRML order, as does the path metrics, memory, or
sequence. The range is 0 to 2.0 for a PR4 channel. The "0" in this case signifies that the drive had
no margin to make the decision, that it could have read every single bit wrongly, and that at 2.0 the
drive had as much margin as it could and will never make an error.
The distribution of SAM values will always center on the square of the minimum distance to an error,
i.e., 2.0 for PR4; 1.0 for EPR4 (these numbers are correct when the signal amplitude is normalized,
so sample values are -1 to +1). The width of the distribution is narrow for clean signals, broader for
noisy signals. Misequalized signals have broad, multi-peaked distributions. When the tail of this
distribution crosses zero, it means an error has been made. This can only be determined with
certainty if the correct decode (the correct path through the trellis) is known.
Encoding
Both Peak-Detect and PRML read channels use Run-Length Limited (RLL) coding. This
corresponds to the only part of the channel chip that the DDA does not simulate: that between the
Viterbi detector and the NRZ lines at the output of the chip.
RLL codes impose constraints on the data written to the disk by limiting the minimum and maximum
number of 0's that must come between each pair of 1's in the encoded pattern written to the disk
(head/analog signal). The limitation on the minimum number of "0"s provides transition separation
to avoid pulse crowding. RLL codes are characterized by four parameters, referenced as
(m/n)(d/k):
y modulation code maps m user bits (NRZ data) into n encoded bits (head/analog signal)
y n is always bigger than m, because n smaller than m would mean data is compressed on
the disk; Code Rate = m/n
y d equals the minimum number of 0's between two consecutive 1's
y k equals the maximum number of 0's between two 1's
The DDA does not implement interleaved ML detection, therefore it does not check even and odd
sample streams separately for this limit. However, when the constraints are specified as (d, k1, k2),
one can sum k1 and k2 and use that where k is needed. This allows a series of non-transitions long
enough to unquestionably be an error to be reported as an error. However, it will not catch all the
sequences that would be an RLL violation for interleaved detection.
Error Correction
Prior to the RLL encoding, the user data is normally encoded inside the drive’s microcontroller,
using special error-correction codes (ECC). Thus, there are two levels of encoding.
User Defined Trellis
File Format and Language (version 1)
This feature allows you to define the trellis used by the Viterbi detector in the LeCroy DDA's channel
emulation. The file specifies the target levels and all possible transitions. You can also specify
many significant aspects of our emulated channel, including the proportional (phase) and integral
(period) gain on the clock steering control loop, the AGC gain, adjustment limits, etc. This permits
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